Dear sir/madam,
Before I decide to purchase a Segger J-Link, I would like to make sure it is usable for my particular use-case. In short, I want to manipulate one of the input signals of the Cortex A9 cores inside the I.MX6Q. I have been informed by Freescale that this can be done using JTag, hence my desire for such a device. I do however have a few concerns:
- Does the Segger J-link and/or software support the challenge/response mechanism for the implemented Secure JTAG implementation?
- Can I use the Segger software to assert a single pin, or do I need additional tools for this?
- How does the software understand which input signal is which? Are there some sort of "netlists" provided with the software? Or is this provided through the JTAG controller? Do I need to request these netlists somewhere else?
- Can I use the Segger J-Link with a 20-pin JTAG to 10-pin microJTAG convertor?
I hope someone can shed some light on this for me. Many thanks in advance. Yours,
Roy
Before I decide to purchase a Segger J-Link, I would like to make sure it is usable for my particular use-case. In short, I want to manipulate one of the input signals of the Cortex A9 cores inside the I.MX6Q. I have been informed by Freescale that this can be done using JTag, hence my desire for such a device. I do however have a few concerns:
- Does the Segger J-link and/or software support the challenge/response mechanism for the implemented Secure JTAG implementation?
- Can I use the Segger software to assert a single pin, or do I need additional tools for this?
- How does the software understand which input signal is which? Are there some sort of "netlists" provided with the software? Or is this provided through the JTAG controller? Do I need to request these netlists somewhere else?
- Can I use the Segger J-Link with a 20-pin JTAG to 10-pin microJTAG convertor?
I hope someone can shed some light on this for me. Many thanks in advance. Yours,
Roy