support RISC-V core

    hello:
    i,m using the segger studio to develop the RISC-V core. I checked the sysview documentation and found no support for the RISC-V core.
    Does sysview support trace functionality for the RISC-V core？

    Hello,

    Thank you for your inquiry.
    SystemView is Core architecture independent and can always be used.
    So RISC-V is also supported.

    Best regards,
    Nino

    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: https://www.segger.com/ticket/
    Or you can contact us via e-mail.

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