shyamal.vyas Community Member
- Member since Nov 6th 2024
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- , Reading thread SWD clock signal Rise and Fall time out of specification with J-link plus
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shyamal.vyas -
Posted the thread SWD clock signal Rise and Fall time out of specification with J-link plus.
ThreadWe have been using Segger J-Link plus for debug and programming purpose of one of our project development having RA6T1 Renesas MCU series. While testing JTAG SWD signal programming, we are capturing clock signals having rise and fall time in range of…