Use JLink Commander to debug Cortex-A35

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    • Use JLink Commander to debug Cortex-A35

      Hi,

      I'm evaluation the use of JLink for ARM Cortex-A35 4CPU using JLink Plus.
      Connection fails because it doesn't find CTI. I assume I need to manually set the addresses of the debug port, CTI, ETB, etc, but could not find any suitable command.

      I could not find a useful example in the sample directory as well.

      Is there a script file I can use as guidelines?

      The next step is to test SDK based automation, so if you have any sample project it will be useful as well.

      Thank you!
      Hila
    • Hello,

      You can find an example here:
      Template Example_ConfigTargetSettings_NXP_S32V234.JLinkScript

      Best regards,
      Simon
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    • Thank you Simon, It seems like a very good starting point because "my" A35 is very much like this one, it's a Quad core but with only one cluster (this one has two).


      Still I get the following error:

      onnecting to target via JTAG
      ConfigTargetSettings() start
      ConfigTargetSettings() end - Took 26us
      TotalIRLen = ?, IRPrint = 0x..FFFFFFFFFFFFFFFFFFFFFFF1
      Failed to identify target. Resetting via Reset pin and trying again.
      ConfigTargetSettings() start
      ConfigTargetSettings() end - Took 10us
      TotalIRLen = ?, IRPrint = 0x..FFFFFFFFFFFFFFFFFFFFFFF1
      Error occurred: Could not connect to the target device.
      For troubleshooting steps visit: wiki.segger.com/J-Link_Troubleshooting

      Is it possible that my JLink Plus doesn't support A35?


      Here is my script after modification:

      __constant U32 _INDEX_AHB_AP_SYSTEM = 0; // AHB-AP connected to system bus with access to all peripherals etc.
      __constant U32 _INDEX_APB_AP_CORTEX_A = 1; // Index of AP that identifies the APB-AP that is connected to the Cortex-A cores

      __constant U32 _APB_ADDR_DBGREGS_A35_0 = 0x80090000;
      __constant U32 _APB_ADDR_DBGREGS_A35_1 = 0x80092000;
      __constant U32 _APB_ADDR_DBGREGS_A35_2 = 0x80094000;
      __constant U32 _APB_ADDR_DBGREGS_A35_3 = 0x80096000;
      //
      // USER CONFIGURABLE
      //
      U32 _Index_APCore = _INDEX_APB_AP_CORTEX_A;
      U32 _Addr_DBGREGS = _APB_ADDR_DBGREGS_A35_0;
      const char* _sExecCTIBaseAddr = "CORESIGHT_SetCSCTICoreBaseAddr=0x80098000";



      ...

      int ConfigTargetSettings(void) {
      //
      // Access Port map specfication
      // Core type
      // Access Port to use
      // Specify core base address
      // Specify CTI base address
      //
      JLINK_CORESIGHT_AddAP(0, CORESIGHT_AHB_AP);
      JLINK_CORESIGHT_AddAP(1, CORESIGHT_APB_AP);
      JLINK_CORESIGHT_AddAP(2, CORESIGHT_CUSTOM_AP);
      JLINK_CPU = CORTEX_A35;
      JLINK_CORESIGHT_IndexAPBAPToUse = _Index_APCore; // AP used as debug interface between J-Link and core to be debugged
      JLINK_CORESIGHT_CoreBaseAddr = _Addr_DBGREGS; // Specify Coresight Core Debug Register address to use.
      JLINK_ExecCommand(_sExecCTIBaseAddr); // Specify CoreSight CTI address to use.
      return 0;
      }