I tried to get the example for the non Ultra board going with no success.
I'm using a J-Trace Pro connected using the coresight 20 connector. I've tried this combo with Segger's stm32f407 reference board and TRACE works. The Xplained Ultra has the 20 pin coresight header already installed.
In embedded Studio, I can single step etc but there are no Trace lights on the JTrace at all - emStudio's Execution Trace window shows "Trace disabled".
When I select "debug in Ozone" and select trace Source = Trace Pins, the Trace led lights when I run the code .. but no trace data. It might be something to do with actually starting the Trace .. I've tried using Set Tracepoint to set a Trace Start at the tart of main() but nothing happens - nothing appears in the Break & Tracepoints panel.
I've removed the Ethernet phy board as the Trace led didn't show otherwise.
Has anyone got this to work?
Is there another example somewhere out there?

Might be relevant: I'm doing this under Ubuntu - and I've been using Ozone to do SWD debugging happily using the J-Trace.

extra info: I'm trying this in Windows now ..
When I try to set a Tracepoint (Start), the console shows:
Trace.SetPoint (TP_OP_START_TRACE, "main.c:53");
J-Link API call failed: set tracepoint at 400338

The J-Link control panel shows:
Process:
/home/andrewkelly/Downloads/tools/Ozone_Linux_V338_x86_64/Ozone
Module:
/home/andrewkelly/Downloads/tools/Ozone_Linux_V338_x86_64/Lib/libjlinkarm.so.8.10.0
Version:
V8.10, compiled Sep 25 2024 14:17:54
J-Link:
SEGGER J-Trace PRO V2.0, SN=752001071
J-Link Firmware:
J-Trace PRO V2 Cortex-M compiled Oct 2 2024 11:02:20
J-Link Bootloader:
(FW returned invalid version)
J-Link Uptime:
0d 00h 04m 02s
Selected device:
Debugger: ATSAME70Q21A, Internal: ATSAME70Q21A
Endian:
Little
Voltage:
3.27 V
Target interface:
SWD (4000 kHz)
Host interface:
USB (SN 752001071)

The J-Link Bootloader entry looks a little odd ...

I've done a cleanup (there were a few J-Link versions lying around on my PC) and installed the latest J-Link pack - V8.12f
J-Link Control Panel still shows J-Link Bootloader: (FW returned invalid version)
and I still get
Trace.SetPoint (TP_OP_START_TRACE, "main.c:53");
J-Link API call failed: set tracepoint at 400338
when trying to set a Trace Startpoint.

For what it's worth, here's the Ozone Console contents:
Disabled output of control characters
SEGGER Ozone - The J-Link Debugger V3.38c
J-Link software found at: C:/Program Files/SEGGER/Ozone/JLink_x64.dll
Target core support plugin loaded.: C:/Program Files/SEGGER/Ozone/Plugins/Core/CorePluginARM.dll
Project.SetDevice ("ATSAME70Q21");
Project.SetHostIF ("USB", "");
Project.SetTargetIF ("SWD");
Project.SetTIFSpeed ("4000");
Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
File path resolved: "$(InstallDir)/Config/CPU/Cortex-M7F.svd" was found at "C:/Program Files/SEGGER/Ozone/Config/CPU/Cortex-M7F.svd"
File.Open ("C:/Users/tkell/Downloads/Atmel_ATSAME70_75MHz_TraceExample/Atmel_ATSAME70_75MHz_TraceExample/Output/Debug/Exe/Atmel_ATSAME70_Trace.elf");
File.Open: completed in 172 ms
Program segments:
Address Size Code RO Data RW Data ZI Data Flg
--------- --------- --------- --------- --------- --------- ---
00400000 1 424 1 424 0 0 0 RWE
20400000 4 0 0 4 0 RW
20400004 256 0 0 256 0 RW
2041FF00 256 0 0 256 0 RW
00000000 0 0 0 0 0 RWE
--------- --------- --------- --------- --------- --------- ---
Total: 1 940 1 424 0 516 0
--------- --------- --------- --------- --------- --------- ---
For further information on ELF file data sections, execute command Elf.PrintSectionInfo(0).
Debug.ReadIntoInstCache: updated instruction information within 1 code ranges (0x00400000-0x00400590)
Tools.TraceSettings();
Trace settings were written to the project file.
Project.SetTraceSource ("Trace Pins");
Debug.SetConnectMode (CM_DOWNLOAD_RESET);
Debug.Start();
Device "ATSAME70Q21A" selected.
Found SW-DP with ID 0x0BD11477
DPIDR: 0x0BD11477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x04770041, ADDR: 0x00000000)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Cache: L1 I/D-cache present
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[2][1]: E0001000 CID B105E00D PID 000BB002 DWT
[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
[2][3]: E0000000 CID B105E00D PID 000BB001 ITM
[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
[0][1]: E0040000 CID B105900D PID 000BB9A9 TPIU-M7
I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
Connected to target device.
J-Link/J-Trace serial number: 752001071
Reset type: NORMAL (wiki.segger.com/J-Link_Reset_Strategies)
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Elf.GetBaseAddr(); // returns 0x400000
Target.ReadU32 (0x00400000); // returns 0x4, data is 0x20420000
Target.SetReg ("SP", 0x20420000);
Elf.GetEntryPointPC(); // returns 0x4001A4
Target.SetReg ("PC", 0x4001A4);
J-Link: Flash download: Bank 0 @ 0x00400000: Skipped. Contents already match
Elf.GetBaseAddr(); // returns 0x400000
Target.ReadU32 (0x00400000); // returns 0x4, data is 0x20420000
Target.SetReg ("SP", 0x20420000);
Elf.GetEntryPointPC(); // returns 0x4001A4
Target.SetReg ("PC", 0x4001A4);
Executed J-Link command "SelectTraceSource=1"
Initializing trace type pin with configured Coresight trace components (* indicates set/detected address):
TF: 0x00000000
TMC: 0x00000000
ETB: 0x00000000
MTB: 0x00000000
*TPIU: 0xE0040000
*ETM: 0xE0041000
STM: 0x00000000
PTM: 0x00000000
Memory map 'after startup completion point' is active
Startup complete (PC=0x00400338)
Debug.Continue();
Debug.Halt();
Trace.SetPoint (TP_OP_START_TRACE, "main.c:53");
J-Link API call failed: set tracepoint at 400338

right .. it looks like this:
R800 pulls the RXER line from the PHY daughterboard to ground. This is RXER/QWF on the daughterboard and PD07 for the micro.
PD07 doubles as RXER from the PHY and TRACE3

After noticing that Ozone happened to work when I selected Trace = 2 bits .. I chased each of the TRACE data pins out on the schematic.
Just to be annoying, you have to disconnect the debugger, set the number of pins and then reconnect! I'd tried both 1 and 2 bits before but obviously didn't disconnect/reconnect

As well as RXER being a legitimate signal from the PHY on the daughterboard, it's also TRACE3. So .. I'm going to remove R800 and see if I can now trace at 4 bits.
I'm not sure what impact this will have to the networking capability (maybe there's a reason RXER is pulled to ground) but I'll cross that bridge when I come to it. If it turns out I need it, I'll probably do it via the coresight connector so that it gets removed when I need TRACE.

Anyone got any thoughts as to why this might be a bad idea?

interesting observation: If I set Trace for all 4 data pins in Ozone I get persistent Mem Faults and Usage Faults that resist being explained:
Ozon Trace Settings
Trace Source: Trace Pins
Timestamps: X
CPU Frequency: 300 MHz
Trace Port Width: 4 bit
Maximum Instruction Count: 10M
Trace Timing: Default

If I leave this at the 2 bit setting (no other changes), everything runs fine.

If I slow the micro down the 150 MHz, I can get 4 bits .. might see if I can get a scope onto the TRACE lines, maybe there's some signal corruption on TRACE3/4