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Not sure if this is an SES issue or STM32 issue, so posting here and in an ST forum...
Trying to work with the STM32F411 USB OTG peripheral and compiling with Segger Embedded Studio, I'm having trouble clearing out the USB interrupts.
The USB peripheral has IRQ bits that are write-1 to clear. As can be seen in the image below, the breakpoint has triggered under the case that the desired interrupts are cleared out (OTG_HOST_ONLY_IRQs evaluates to 0xF020000A), however, the debugger's register view is showing that they are in fact not cleared. It is suspicious that the value loaded into reg_value happens to be 0x04000020 as this is the stated default value of GINTSTS according to the reference manual (RM0383 rev 3). The CMOD bit is the only bit in this register that is not an interrupt and is correctly showing 1 (host mode) in the debugger's register report, but this bit did not get set when the value of GINTSTS was copied into reg_value. I don't see anything in the reference manual that would indicate GINTSTS needs to be unlocked somehow before doing a read, and the debugger's register report appears to reflect the true value, since if I skip trying to verify the IRQs are cleared and immediately enable the NVIC global interrupt, code branches immediately to the ISR. It is not clear to me why the debug tool correctly reads this register while the compiled code cannot.
Trying to work with the STM32F411 USB OTG peripheral and compiling with Segger Embedded Studio, I'm having trouble clearing out the USB interrupts.
The USB peripheral has IRQ bits that are write-1 to clear. As can be seen in the image below, the breakpoint has triggered under the case that the desired interrupts are cleared out (OTG_HOST_ONLY_IRQs evaluates to 0xF020000A), however, the debugger's register view is showing that they are in fact not cleared. It is suspicious that the value loaded into reg_value happens to be 0x04000020 as this is the stated default value of GINTSTS according to the reference manual (RM0383 rev 3). The CMOD bit is the only bit in this register that is not an interrupt and is correctly showing 1 (host mode) in the debugger's register report, but this bit did not get set when the value of GINTSTS was copied into reg_value. I don't see anything in the reference manual that would indicate GINTSTS needs to be unlocked somehow before doing a read, and the debugger's register report appears to reflect the true value, since if I skip trying to verify the IRQs are cleared and immediately enable the NVIC global interrupt, code branches immediately to the ISR. It is not clear to me why the debug tool correctly reads this register while the compiled code cannot.