JLINK and FLASHER programming/verification error.

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    • JLINK and FLASHER programming/verification error.

      New

      Hello;

      I try to program renesas R7FA2L1AB via Flasher Compact.While programming stage ;

      if i get "****** Error: Verification of RAMCode failed @ address 0x20000344." error , i get the verification error at the end of programming


      If this happens once, I keep getting verification error.

      If i dont get an error like that,the programming and verification phase complete without any error.

      I use this script while programming

      "eoe 1
      usb 0
      si SWD
      power on
      r
      h
      loadfile test.hex
      qc
      "

      You can see the log below.
      Do you have any idea?

      Thanks.

      SEGGER J-Link Commander V7.20 (Compiled Apr 28 2021 17:35:36)
      DLL version V7.20, compiled Apr 28 2021 17:34:08
      J-Link Command File read successfully.
      Processing script file...
      J-Link Commander will now exit on Error
      Connecting to J-Link via USB...O.K.
      Firmware: J-Link / Flasher Compact V5 compiled Mar 30 2022 10:20:21
      Hardware version: V5.00
      S/N: 1015000945
      License(s): JFlash, GDB
      VTref=4.779V
      Selecting SWD as current target interface.
      Target connection not established yet but required for command.
      Device "R7FA2L1AB" selected.
      Connecting to target via SWD
      Found SW-DP with ID 0x5BA02477
      Found SW-DP with ID 0x5BA02477
      DPIDR: 0x5BA02477
      Scanning AP map to find all available APs
      AP[2]: Stopped AP scan as end of AP map has been reached
      AP[0]: AHB-AP (IDR: 0x74770001)
      AP[1]: APB-AP (IDR: 0x44770002)
      Iterating through AP map to find AHB-AP to use
      AP[0]: Core found
      AP[0]: AHB-AP ROM base: 0x4001A000
      CPUID register: 0x411CD200. Implementer code: 0x41 (ARM)
      Found Cortex-M23 r1p0, Little endian.
      FPUnit: 4 code (BP) slots and 0 literal slots
      Security extension: not implemented
      CoreSight components:
      ROMTbl[0] @ 4001A000
      ROMTbl[0][0]: E000E000, CID: B105900D, PID: 000BBD20 Cortex-M23
      ROMTbl[0][1]: E0001000, CID: B105900D, PID: 000BBD20 DWT
      ROMTbl[0][2]: E0002000, CID: B105900D, PID: 000BBD20 FPB
      ROMTbl[0][3]: 40019000, CID: B105900D, PID: 000BBD20 MTB
      Cortex-M23 identified.
      Reset delay: 0 ms
      Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
      Reset: Halt core after reset via DEMCR.VC_CORERESET.
      Reset: Reset device via AIRCR.SYSRESETREQ.
      PC = 0002FA60, CycleCnt = 00000000
      R0 = 20000B58, R1 = 000000FD, R2 = 0000001F, R3 = 000000FD
      R4 = 000000FD, R5 = 000000FF, R6 = 20005580, R7 = 00000000
      R8 = 0796202C, R9 = 379F0769, R10= 5BD0601E, R11= 8F22E2F3
      R12= 00000C90
      SP(R13)= 200055F0, MSP= 200055F0, PSP= 79BA0908, R14(LR) = 00003E63
      XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
      CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
      FPU regs: FPU not enabled / not implemented on connected CPU.
      Without any give address range, Erase Chip will be executed
      Erasing device...
      ****** Error: Verification of RAMCode failed @ address 0x20000344.
      Write: 0x6AF0FFF1 D0F92800
      Read: 0xB5F0FFF1 D0F92800
      Failed to prepare for programming.
      Failed to download RAMCode!
      ERROR: Erase returned with error code -1.
      Script processing completed.
      SEGGER J-Link Commander V7.20 (Compiled Apr 28 2021 17:35:36)
      DLL version V7.20, compiled Apr 28 2021 17:34:08
      J-Link Command File read successfully.
      Processing script file...
      J-Link Commander will now exit on Error
      Connecting to J-Link via USB...O.K.
      Firmware: J-Link / Flasher Compact V5 compiled Mar 30 2022 10:20:21
      Hardware version: V5.00
      S/N: 1015000945
      License(s): JFlash, GDB
      VTref=4.852V
      Selecting SWD as current target interface.
      Target connection not established yet but required for command.
      Device "R7FA2L1AB" selected.
      Connecting to target via SWD
      Found SW-DP with ID 0x5BA02477
      Found SW-DP with ID 0x5BA02477
      DPIDR: 0x5BA02477
      Scanning AP map to find all available APs
      AP[2]: Stopped AP scan as end of AP map has been reached
      AP[0]: AHB-AP (IDR: 0x74770001)
      AP[1]: APB-AP (IDR: 0x44770002)
      Iterating through AP map to find AHB-AP to use
      AP[0]: Core found
      AP[0]: AHB-AP ROM base: 0x4001A000
      CPUID register: 0x411CD200. Implementer code: 0x41 (ARM)
      Found Cortex-M23 r1p0, Little endian.
      FPUnit: 4 code (BP) slots and 0 literal slots
      Security extension: not implemented
      CoreSight components:
      ROMTbl[0] @ 4001A000
      ROMTbl[0][0]: E000E000, CID: B105900D, PID: 000BBD20 Cortex-M23
      ROMTbl[0][1]: E0001000, CID: B105900D, PID: 000BBD20 DWT
      ROMTbl[0][2]: E0002000, CID: B105900D, PID: 000BBD20 FPB
      ROMTbl[0][3]: 40019000, CID: B105900D, PID: 000BBD20 MTB
      Cortex-M23 identified.
      Reset delay: 0 ms
      Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
      Reset: Halt core after reset via DEMCR.VC_CORERESET.
      Reset: Reset device via AIRCR.SYSRESETREQ.
      PC = 0002FA60, CycleCnt = 00000000
      R0 = 20000B10, R1 = 000000FD, R2 = 00000002, R3 = 000000FD
      R4 = 000000FD, R5 = 000000FF, R6 = 20005580, R7 = 00000000
      R8 = 0796202C, R9 = 379F0769, R10= 5BD0601E, R11= 8F22E2F3
      R12= 00000075
      SP(R13)= 200055F0, MSP= 200055F0, PSP= 79BA0908, R14(LR) = 00003E63
      XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
      CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
      FPU regs: FPU not enabled / not implemented on connected CPU.
      Without any give address range, Erase Chip will be executed
      Erasing device...
      CPU is running at low speed (8000 kHz).
      J-Link: Flash download: Total time needed: 0.321s (Prepare: 0.214s, Compare: 0.000s, Erase: 0.095s, Program: 0.000s, Verify: 0.000s, Restore: 0.011s)
      CPU is running at low speed (8000 kHz).
      J-Link: Flash download: Total time needed: 0.946s (Prepare: 0.132s, Compare: 0.000s, Erase: 0.803s, Program: 0.000s, Verify: 0.000s, Restore: 0.011s)
      CPU is running at low speed (8000 kHz).
      J-Link: Flash download: Total time needed: 0.172s (Prepare: 0.122s, Compare: 0.000s, Erase: 0.038s, Program: 0.000s, Verify: 0.000s, Restore: 0.011s)
      Erasing done.
      Downloading file [106650_FIRMWARE.hex]...
      CPU is running at low speed (8000 kHz).
      J-Link: Flash download: Bank 0 @ 0x01010010: Skipped. Contents already match
      CPU is running at low speed (8000 kHz).
      J-Link: Flash download: Bank 1 @ 0x00000000: 3 ranges affected (233472 bytes)
      J-Link: Flash download: Total: 3.906s (Prepare: 0.254s, Compare: 0.111s, Erase: 0.000s, Program & Verify: 3.404s, Restore: 0.136s)
      J-Link: Flash download: Program & Verify speed: 66 KB/s
      O.K.
      Opening binary file for writing... [106650_FIRMWARE.save.bin]
      Reading 262144 bytes from addr 0x00000000 into file...O.K.
      Script processing completed.
      SEGGER J-Link Commander V7.20 (Compiled Apr 28 2021 17:35:36)
      DLL version V7.20, compiled Apr 28 2021 17:34:08
      J-Link Command File read successfully.
      Processing script file...
      J-Link Commander will now exit on Error
      Connecting to J-Link via USB...O.K.
      Firmware: J-Link / Flasher Compact V5 compiled Mar 30 2022 10:20:21
      Hardware version: V5.00
      S/N: 1015000945
      License(s): JFlash, GDB
      VTref=4.850V
      Selecting SWD as current target interface.
      Target connection not established yet but required for command.
      Device "R7FA2L1AB" selected.
      Connecting to target via SWD
      Found SW-DP with ID 0x5BA02477
      Found SW-DP with ID 0x5BA02477
      DPIDR: 0x5BA02477
      Scanning AP map to find all available APs
      AP[2]: Stopped AP scan as end of AP map has been reached
      AP[0]: AHB-AP (IDR: 0x74770001)
      AP[1]: APB-AP (IDR: 0x44770002)
      Iterating through AP map to find AHB-AP to use
      AP[0]: Core found
      AP[0]: AHB-AP ROM base: 0x4001A000
      CPUID register: 0x411CD200. Implementer code: 0x41 (ARM)
      Found Cortex-M23 r1p0, Little endian.
      FPUnit: 4 code (BP) slots and 0 literal slots
      Security extension: not implemented
      CoreSight components:
      ROMTbl[0] @ 4001A000
      ROMTbl[0][0]: E000E000, CID: B105900D, PID: 000BBD20 Cortex-M23
      ROMTbl[0][1]: E0001000, CID: B105900D, PID: 000BBD20 DWT
      ROMTbl[0][2]: E0002000, CID: B105900D, PID: 000BBD20 FPB
      ROMTbl[0][3]: 40019000, CID: B105900D, PID: 000BBD20 MTB
      Cortex-M23 identified.
      PC = 0000CCDC, CycleCnt = 00000000
      R0 = 00000000, R1 = 2000514E, R2 = 0003FFC0, R3 = 00000001
      R4 = 000000FD, R5 = 000000FF, R6 = 20005580, R7 = 00000000
      R8 = 0796202C, R9 = 379F0769, R10= 5BD0601E, R11= 8F22E2F3
      R12= 00000075
      SP(R13)= 200055D0, MSP= 200055D0, PSP= 79BA0908, R14(LR) = 0000CC77
      XPSR = 41000000: APSR = nZcvq, EPSR = 01000000, IPSR = 000 (NoException)
      CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
      FPU regs: FPU not enabled / not implemented on connected CPU.
      Loading binary file 106650_FIRMWARE.bin
      Reading 262144 bytes data from target memory @ 0x00000000.
      Verify failed @ address 0x00000334.
      Expected FF read FE
      ERROR: Verify failed.
      Script processing completed.