[SOLVED] SWO during Debugging Microcontroller Renesas RA6M5 (R7FA6M5BH) in Renesas demoboard doesn't work using Jlink Ultra+ and instead works with J-Link OB-S124 embedded in demoboard

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  • [SOLVED] SWO during Debugging Microcontroller Renesas RA6M5 (R7FA6M5BH) in Renesas demoboard doesn't work using Jlink Ultra+ and instead works with J-Link OB-S124 embedded in demoboard

    I'm using a Renesas demobaord with RA6M5 (R7FA6M5BH) microcontroller and e2studio IDE-Debugger (eclipse based)
    I configured debugging with jlink over SWD and enabled SWO for printf debug using ITM (SWO)

    Debugging with an external Jlink Ultra+ (version 7.96H) i didn't see any print on console
    Instead, using an oboard jlink (J-Link OB-S124 compiled Oct 30 2023) SWO works fine and i see print on console

    Capturing jlink DLL log in both cases, when SWO is enabled in IDE, i saw a difference in registers programming sequence, writing TPIU_ACPR:
    in case of on boad J-Link OB-S124, 0xC7 value is written and SWO works, instead in case of Jlink Ultra+, 0x02 value is written and SWO doesn't work

    Attached log for both sequences.

    Due nothing changed in IDE-Debug settings (in e2studio project) in both cases, i suppose that different behaviour is up to jlink devices, so it seems an issue on jlink Ultra+ firmware

    I'm not able to perform a similar test using SEGGER OZONE due a critical issue in OZONE with enabling SWO using Renesas RA6M5
    See this post:
    forum.segger.com/index.php/Thr…U/?postID=33883#post33883
    Files

  • I doubt that it is a problem with the ULTRA+ firmware but more a setup issue.
    Probably you have set the SWO speed to “max”
    and the ULTRA+ (which is capable to handle up to 100 MHz SWO speeds) leads to settings that exceed the max. speed of the MCU’s I/Os.
    What SWO speed do you use?
    Did you check if selecting a fixed speed of 1 or 4 MHz for SWO works with both probes?
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Alex, thanks for reply

    As i said in my post, i cannot perform the same test using segger ozone due another issue (posted)
    Instead i did my test using renesas e2studio (eclipse based) where i have limited config options for jlink debugger
    I followed steps provided by renesas : en-support.renesas.com/knowledgeBase/20540919

    I can only set core speed, as they explained (see below)
    The only difference is jlink used: OB or Ultra+, and differences i saw in logs attached in previous post (i'm not able to understand what SWO speed is used in both cases, from the logs)

    In my understanding, following your request, if i read jlink logs in both cases, as i said above:
    if CPU bus speed for SWO is 100MHz inside the core (according to Renesas docs), settings for TPIU_ACPR register means 500KHz for SWO pin speed in case of OB, and around 67MHz in case of Ultra+, but i have no chance to change behaviour with debugger settings in e2studio IDE.
    (Only in OZONE i have more control on SWO settings, but it causes microcontroller stuck)

    Do you think i have to open a ticket for this?
    Thanks in advance
    [img]https://en-support.renesas.com/api/attachments/image/784358/e3efa3ed-563a-4440-b10f-2fcd9e78e5ed.png[/img]

    The post was edited 1 time, last by pbizzarri ().

  • Not being able to specify the SWO speed is bad… Having it on “max possible” is OK but not being able to change that setting is a bad thing because different models have different max. speeds :(

    May be worth opening a ticket at Renesas for this because it should not be a big change for them (nothing would change for 99% of their users)

    But 67 MHz SWO speed has a high probability of being problematic. Many I/Os are not capable of speeds beyond 50 MHz (if that high at all).
    You can easily mess things up for such frequencies by placing series resistors etc. that are too big for this league of speeds.

    What you may try is:
    Limiting the max SWO speed of the ULTRA+ artificially. You may achieve this via J-Link Configurator:
    wiki.segger.com/J-Link_Configu…g_the_J-Link_Configurator
    I recommend to set max. SWO speed to something like 8 MHz or so in your case.
    You may even try 500 kHz like the OB but pretty sure that 4, 8 or even 16 MHz will still work.

    Regarding the Ozone thread:
    Pretty sure AlexD or someone else from the department will help you out.
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Alex.
    You are right! I used J-Link Configurator to set max SWO speed to 1MHz, and with the same scenario i saw from jlink log that now TPIU_ACPR is set to 99 (so clock prescaler 100, so from 100MHz SWO pin clock is 1MHz) and now it works!!


    So, my understanding was also corrects: some behaviours are up to JLINK devices and can be changed with settings from IDE, but renesas IDE sets few parameters.


    Regarding the Ozone thread:
    We like to debug with it, it is a very powerful tool, so i will wait for reply from your collegues, hopefully soon as possible


    Thanks

    The post was edited 1 time, last by pbizzarri ().