write in the flash in twice

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    • write in the flash in twice

      hi,
      I use RT1176 and i have to write flash (mapped to 0x30000000)
      The FW is divided into two parts,
      • a first part called the boot header exactly 8K in size
      • a second part which is the actual application and starts at offset 0x2000.
      For each of the two parts I have an elf file.


      How do I write both parts into the flash using a script?

      I tried the following script:

      Source Code

      1. device MIMXRT1176xxxA_M7
      2. if SWD
      3. speed auto
      4. connect
      5. sleep 1
      6. loadfile "FW/image/Ama_BootHdr.elf"
      7. sleep 1
      8. loadfile "FW/image/Ama.elf"
      9. exit




      But I get a timeout error when trying to write the second part:

      Source Code

      1. SEGGER J-Link Commander V7.92n (Compiled Oct 31 2023 15:15:57)
      2. DLL version V7.92n, compiled Oct 31 2023 15:15:34
      5. J-Link Command File read successfully.
      6. Processing script file...
      7. J-Link>device MIMXRT1176xxxA_M7
      8. J-Link connection not established yet but required for command.
      9. Connecting to J-Link via USB...O.K.
      10. Firmware: J-Link Ultra V4 compiled Sep 22 2022 15:00:10
      11. Hardware version: V4.00
      12. J-Link uptime (since boot): N/A (Not supported by this model)
      13. S/N: 504400379
      14. License(s): RDI, FlashBP, FlashDL, JFlash, GDB
      15. VTref=3.308V
      16. J-Link>if SWD
      17. Selecting SWD as current target interface.
      18. J-Link>speed auto
      19. Selecting auto as target interface speed
      20. J-Link>connect
      21. Device "MIMXRT1176XXXA_M7" selected.
      24. Connecting to target via SWD
      25. Found SW-DP with ID 0x6BA02477
      26. DPIDR: 0x6BA02477
      27. CoreSight SoC-400 or earlier
      28. Scanning AP map to find all available APs
      29. AP[3]: Stopped AP scan as end of AP map has been reached
      30. AP[0]: AHB-AP (IDR: 0x84770001)
      31. AP[1]: AHB-AP (IDR: 0x24770011)
      32. AP[2]: APB-AP (IDR: 0x54770002)
      33. Iterating through AP map to find AHB-AP to use
      34. AP[0]: Core found
      35. AP[0]: AHB-AP ROM base: 0xE00FD000
      36. CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
      37. Cache: L1 I/D-cache present
      38. Found Cortex-M7 r1p2, Little endian.
      39. FPUnit: 8 code (BP) slots and 0 literal slots
      40. CoreSight components:
      41. ROMTbl[0] @ E00FD000
      42. [0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
      43. ROMTbl[1] @ E00FE000
      44. [1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
      45. ROMTbl[2] @ E00FF000
      46. [2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
      47. [2][1]: E0001000 CID B105E00D PID 000BB002 DWT
      48. [2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
      49. [2][3]: E0000000 CID B105E00D PID 000BB001 ITM
      50. [1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
      51. [1][2]: E0042000 CID B105900D PID 004BB906 CTI
      52. [0][1]: E0043000 CID B105900D PID 001BB908 CSTF
      53. I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
      54. D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
      55. Memory zones:
      56. Zone: "Default" Description: Default access mode
      57. Cortex-M7 identified.
      58. J-Link>sleep 1
      59. Sleep(1)
      60. J-Link>loadfile "FW/image/Ama_BootHdr.elf"
      61. 'loadfile': Performing implicit reset & halt of MCU.
      62. Reset: Halt core after reset via DEMCR.VC_CORERESET.
      63. Reset: Reset device via AIRCR.SYSRESETREQ.
      64. Core did not halt after reset, halting it manually.
      65. AfterResetTarget() start
      66. Valid application detected. Setting PC / SP manually.
      67. Booting from FlexSPI1.
      68. AfterResetTarget() end - Took 52.8ms
      69. Downloading file [FW/image/Ama_BootHdr.elf]...
      70. J-Link: Flash download: Bank 0 @ 0x30000000: 1 range affected (65536 bytes)
      71. J-Link: Flash download: Total: 1.457s (Prepare: 0.277s, Compare: 0.212s, Erase: 0.467s, Program: 0.000s, Verify: 0.499s, Restore: 0.000s)
      72. J-Link: Flash download: Program speed: 0 KB/s
      74. ****** Error: Verification failed @ address 0x30000000
      75. Timeout while programming sector, RAMCode did not respond in time!
      76. Error while programming flash: Verify failed.
      77. J-Link>sleep 1
      78. Sleep(1)
      79. J-Link>loadfile "FW/image/Ama.elf"
      80. 'loadfile': Performing implicit reset & halt of MCU.
      81. Reset: Halt core after reset via DEMCR.VC_CORERESET.
      82. Reset: Reset device via AIRCR.SYSRESETREQ.
      83. Reset: SYSRESETREQ has confused core.
      84. Found SW-DP with ID 0x6BA02477
      85. DPIDR: 0x6BA02477
      86. CoreSight SoC-400 or earlier
      87. AP map detection skipped. Manually configured AP map found.
      88. AP[0]: AHB-AP (IDR: Not set)
      89. AP[0]: Core found
      90. AP[0]: AHB-AP ROM base: 0xE00FD000
      91. CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
      92. Cache: L1 I/D-cache present
      93. Found Cortex-M7 r1p2, Little endian.
      94. Reset: Using fallback: VECTRESET.
      95. Reset: Halt core after reset via DEMCR.VC_CORERESET.
      96. Reset: Reset device via AIRCR.VECTRESET.
      97. AfterResetTarget() start
      98. AfterResetTarget() end - Took 159ms
      99. Downloading file [FW/image/Ama.elf]...
      101. ****** Error: Timeout while get device description, RAMCode did not respond in time!
      102. SEGGER_OPEN_GetFlashInfo(): RAMCode never stops. failed to determine dynamic flash info.
      103. Error while determining flash info (Bank @ 0x30000000)
      104. Unspecified error -1
      105. J-Link>exit
      107. Script processing completed.
      Display All
      in particular I notice that the affected ranges for the boot header is 64KB which corresponds to the largest erasable sector of my flash. In addition, I have a verification error.

      I tried swapping the two files:

      Source Code

      1. device MIMXRT1176xxxA_M7
      2. if SWD
      3. speed auto
      4. connect
      5. sleep 1
      6. loadfile "FW/image/Ama.elf"
      7. sleep 1
      8. loadfile "FW/image/Ama_BootHdr.elf"
      9. exit

      the behavior changes, I no longer have timeouts:


      Source Code

      1. SEGGER J-Link Commander V7.92n (Compiled Oct 31 2023 15:15:57)
      2. DLL version V7.92n, compiled Oct 31 2023 15:15:34
      5. J-Link Command File read successfully.
      6. Processing script file...
      7. J-Link>device MIMXRT1176xxxA_M7
      8. J-Link connection not established yet but required for command.
      9. Connecting to J-Link via USB...O.K.
      10. Firmware: J-Link Ultra V4 compiled Sep 22 2022 15:00:10
      11. Hardware version: V4.00
      12. J-Link uptime (since boot): N/A (Not supported by this model)
      13. S/N: 504400379
      14. License(s): RDI, FlashBP, FlashDL, JFlash, GDB
      15. VTref=3.308V
      16. J-Link>if SWD
      17. Selecting SWD as current target interface.
      18. J-Link>speed auto
      19. Selecting auto as target interface speed
      20. J-Link>connect
      21. Device "MIMXRT1176XXXA_M7" selected.
      24. Connecting to target via SWD
      25. Found SW-DP with ID 0x6BA02477
      26. DPIDR: 0x6BA02477
      27. CoreSight SoC-400 or earlier
      28. Scanning AP map to find all available APs
      29. AP[3]: Stopped AP scan as end of AP map has been reached
      30. AP[0]: AHB-AP (IDR: 0x84770001)
      31. AP[1]: AHB-AP (IDR: 0x24770011)
      32. AP[2]: APB-AP (IDR: 0x54770002)
      33. Iterating through AP map to find AHB-AP to use
      34. AP[0]: Core found
      35. AP[0]: AHB-AP ROM base: 0xE00FD000
      36. CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
      37. Cache: L1 I/D-cache present
      38. Found Cortex-M7 r1p2, Little endian.
      39. FPUnit: 8 code (BP) slots and 0 literal slots
      40. CoreSight components:
      41. ROMTbl[0] @ E00FD000
      42. [0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
      43. ROMTbl[1] @ E00FE000
      44. [1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
      45. ROMTbl[2] @ E00FF000
      46. [2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
      47. [2][1]: E0001000 CID B105E00D PID 000BB002 DWT
      48. [2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
      49. [2][3]: E0000000 CID B105E00D PID 000BB001 ITM
      50. [1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
      51. [1][2]: E0042000 CID B105900D PID 004BB906 CTI
      52. [0][1]: E0043000 CID B105900D PID 001BB908 CSTF
      53. I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
      54. D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
      55. Memory zones:
      56. Zone: "Default" Description: Default access mode
      57. Cortex-M7 identified.
      58. J-Link>sleep 1
      59. Sleep(1)
      60. J-Link>loadfile "FW/image/Ama.elf"
      61. 'loadfile': Performing implicit reset & halt of MCU.
      62. Reset: Halt core after reset via DEMCR.VC_CORERESET.
      63. Reset: Reset device via AIRCR.SYSRESETREQ.
      64. Core did not halt after reset, halting it manually.
      65. AfterResetTarget() start
      66. Valid application detected. Setting PC / SP manually.
      67. Booting from FlexSPI1.
      68. AfterResetTarget() end - Took 53.1ms
      69. Downloading file [FW/image/Ama.elf]...
      70. J-Link: Flash download: Bank 0 @ 0x30000000: 1 range affected (262144 bytes)
      71. J-Link: Flash download: Total: 6.568s (Prepare: 0.326s, Compare: 1.632s, Erase: 1.835s, Program: 2.173s, Verify: 0.402s, Restore: 0.196s)
      72. J-Link: Flash download: Program speed: 117 KB/s
      74. ****** Error: Verification failed @ address 0x30000000
      75. Error while programming flash: Verify failed.
      76. J-Link>sleep 1
      77. Sleep(1)
      78. J-Link>loadfile "FW/image/Ama_BootHdr.elf"
      79. 'loadfile': Performing implicit reset & halt of MCU.
      80. Reset: Halt core after reset via DEMCR.VC_CORERESET.
      81. Reset: Reset device via AIRCR.SYSRESETREQ.
      82. Core did not halt after reset, halting it manually.
      83. AfterResetTarget() start
      84. Valid application detected. Setting PC / SP manually.
      85. Booting from FlexSPI1.
      86. AfterResetTarget() end - Took 53.0ms
      87. Downloading file [FW/image/Ama_BootHdr.elf]...
      88. J-Link: Flash download: Bank 0 @ 0x30000000: 1 range affected (262144 bytes)
      89. J-Link: Flash download: Total: 6.592s (Prepare: 0.326s, Compare: 1.627s, Erase: 1.805s, Program: 2.234s, Verify: 0.402s, Restore: 0.195s)
      90. J-Link: Flash download: Program speed: 114 KB/s
      92. ****** Error: Verification failed @ address 0x30000000
      93. Error while programming flash: Verify failed.
      94. J-Link>exit
      96. Script processing completed.
      Display All
      for both parts I have the address 0x30000000, which is incorrect for the application, and the affected range is 262144 for both. They also both fail verification.


      so how should the script be for me to write the two parts, verifying both?

      best regards
      Max