[SOLVED] SES disassembly view look stange

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  • [SOLVED] SES disassembly view look stange

    Hi, I work with SES and the j-Link Mini. I'm able to compile the example projekt "RaspberryPi_Pico_QSPI_Blinky" for the RP2040 and connect to the target. When I start the debugger, I can see in the disassembly window the C source but no disassembled code.
    Is there any option that I have to set.

    Regards and thanks for support
    Lothar
    Files

    • Disassembly.pdf

      (125.3 kB, downloaded 183 times, last: )

  • Hello Lothar,

    You have to supply the memory information to your Embedded Studio project so the debugger knows there is valid memory there and it may access it during debugging.
    On many target devices there are memory sections e.g. ROM Bootloader (RP2040 has this as well) where they could jump to during run time and depending on the chip it might then crash or even get bricked. So as a precaution the debugger will only disassemble known memory areas.

    To supply such area you can either use a memory map file (e.g. this is done in the example projects if you use the example project template from the CPU Packages), or via the Memory Segments project option or if you feel brave you can disable that limitation by setting Debug > Debugger > Restrict Memory Access to No.

    But as you have notified us that you no longer are pursuing this project this thread will be closed now.

    Best regards,
    Nino
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