Hello,
We have developed a custom board that uses an LPC54S016JET100 processor. The board uses the LPCXpresso54S018-EVK board as the reference design. The new board is using an ISSI chip (IS25LP128F) for the serial flash.
We can load the software into serial flash on the board using the CMIS_DAP boot loader. However, if we try to use the Segger J-Link boot loader, the loading process fails. In both cases we are using an MCU-Link Pro card to perform the loading of the target platform.
I have to mention that the LPC54S018-EVK connects the QSPI reset pin to P2_12; However, that pin is not available on the processor we have, so the QSPI reset pin is connected to PIO0_23 in our board.
My question is, does J-Link assert a reset on the QSPI flash as part of the programming process for this particular part? and if this difference in pins can be the cause of J-Link failing to program flash?
Regards,
Mohammad
We have developed a custom board that uses an LPC54S016JET100 processor. The board uses the LPCXpresso54S018-EVK board as the reference design. The new board is using an ISSI chip (IS25LP128F) for the serial flash.
We can load the software into serial flash on the board using the CMIS_DAP boot loader. However, if we try to use the Segger J-Link boot loader, the loading process fails. In both cases we are using an MCU-Link Pro card to perform the loading of the target platform.
I have to mention that the LPC54S018-EVK connects the QSPI reset pin to P2_12; However, that pin is not available on the processor we have, so the QSPI reset pin is connected to PIO0_23 in our board.
My question is, does J-Link assert a reset on the QSPI flash as part of the programming process for this particular part? and if this difference in pins can be the cause of J-Link failing to program flash?
Regards,
Mohammad