The STM32L0xx CPU Support Package v2.06 is not generating a correct register XML file for the STM32L062 family (and presumably others). The XML file is placing the DBG_TIM22_STOP bit in register DBG_APB2_FZ as bit 6, but according to the ST datasheet (Reference manual for Ultra-low-power STM32L0x2 advanced Arm®-based 32-bit MCUs RM0376 Rev 7, page 935) this is bit 5. See attached image.
[SOLVED] SES 6.32 producing incorrect register map for STM32L0x family
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