[SOLVED] (Yet another) Failed to power up DAP

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  • (Yet another) Failed to power up DAP

    J-Link Commander is unable to connect to my ATSAMS70N19A, and I'm not sure why. Some comments:
    • The J-Link Base is running V7.62A (i.e. recent)
    • VTref is 3.3V as expected
    • On the SWD connector, I observe RESET_ going low for 50 mSec, then a clean clock with data
    • As suggested by J-Link cannot connect to the CPU, I've reduced the clock rate to 100KHz


    Here's the J-Link Commander output:

    Source Code

    1. SEGGER J-Link Commander V7.62a (Compiled Feb 23 2022 17:04:13)
    2. DLL version V7.62a, compiled Feb 23 2022 17:02:56
    3. Connecting to J-Link via USB...O.K.
    4. Firmware: J-Link V10 compiled Nov 2 2021 12:14:50
    5. Hardware version: V10.10
    6. S/N: 50123455
    7. License(s): GDB
    8. VTref=3.303V
    9. Type "connect" to establish a target connection, '?' for help
    10. J-Link>
    11. Unknown command. '?' for help.
    12. J-Link>con
    13. Please specify device / core. <Default>: ATSAMS70N19A
    14. Type '?' for selection dialog
    15. Device>
    16. Please specify target interface:
    17. J) JTAG (Default)
    18. S) SWD
    19. T) cJTAG
    20. TIF>s
    21. Specify target interface speed [kHz]. <Default>: 4000 kHz
    22. Speed>100
    23. Device "ATSAMS70N19A" selected.
    24. Connecting to target via SWD
    25. Found SW-DP with ID 0x0BD11477
    26. Failed to power up DAP
    27. Found SW-DP with ID 0x0BD11477
    28. Failed to power up DAP
    29. Found SW-DP with ID 0x0BD11477
    30. Failed to power up DAP
    31. Found SW-DP with ID 0x0BD11477
    32. Failed to power up DAP
    33. Cannot connect to target.
    34. J-Link>
    Display All
    And the corresponding traffic over the SWD port. The top group is the zoomed out view, the lower group details a part of the transaction. Yellow trace is RESET_, cyan trace is CLK, magenta trace is DIO. I don't know enough about the protocol to know how to interpret the data:
  • [SOLVED] (Yet another) Failed to power up DAP

    Update: I'm prepared to blame this as a hardware problem: I connected a second (putatively) identical board, and it connects and programs without any error.
  • Can also be the SW running on the "defective" board.
    In contrast to common believe it is quite easy to lockup certain MCUs by mistakes like: "I accidentally configured the debug PIOs as GPIOs"
    If there is any fallback to regain control over the chip again, before it executes the bad code, heavily depends on the chip and if the manufacturer implemented a fallback. (This is something that is *not* covered by the ARM debug spec.)

    We will close this for now as it seems to be a setup / user-related issue rather than a generic issue in the J-Link software.
    Feel free to PM if you think a reopen is appropriate.


    BR
    Alex
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