[SOLVED] Are there any pins which are internally pulled(up/down) on Jlink?

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  • [SOLVED] Are there any pins which are internally pulled(up/down) on Jlink?

    If so, Is there a way to disconnect any of the pulls by a command?
    Back story:
    We are using 2 lines for UART(5 and 17 as mentioned in your wiki for UART) and for other purposes and we suspected these lines are being pulled by Jlink.
    We are trying to run acclerometer test before initial uart (before enabling uart) which share the same pin on our custom board.
    The test failed, but when disconnect the line that connect to pin 5 in jlink (plus) , acc test pass.
    Any suggestions ?
    Thanks,
    Ben

  • Can you please send the S/N of your J-Link?
    We can then provide more detailed information about the circuit.

    BR
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
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  • Hi,

    Please find attached an excerpt from the schematics which shows the pull-downs on the debug lines.
    These are not configurable and should not be needed to be.
    The debug signals then go further to 74LVC1T45GW buffers to allow 1.2V - 5V target interface voltages.
    Pin 5 == TDI == Used as UART_Tx when using VCOM functionality.
    This pin will be configured as output if VCOM is enabled on J-Link, so it is actively driven by J-Link.
    Images

    • JLinkV11_Pulls.png

      91.1 kB, 851×503, viewed 249 times
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.