[SOLVED] STM32G474VE - Am I missing steps to enable trace?

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  • [SOLVED] STM32G474VE - Am I missing steps to enable trace?

    I have managed to get trace working using IAR, but unable to get trace working when importing .out file into Ozone.
    I just get 'no data' message in trace window. No activity on the TRACECLK.
    I (quickly) played around with Embedded Studio and seemed to get similar results.
    Also, seemingly no SWO trace either (View->Code Profile)

    My steps to repeat are as follows:
    Create Cube project using 8MHz crystal direct (no PLL) and 4pin TRACE
    Load into IAR 8.50.5 and verify trace - It works. (But not reliable at speed due to IAR not handling errors correctly)
    Scope of TRACECLK shows activity (4MHz, half the HCK)
    Disconnect and close IAR

    Then:
    Open Ozone 3.20e, use project wizard to set device and import the *.out file generated by IAR
    Turn on trace using Tools->Trace settings...
    Debug - SWD works but, but no trace.
    Scope of the TRACECLK shows no activity.

    Question:
    Are there any steps I am missing that are not provided as part of generating the new project?
    Is anyone else is using J-Trace with Ozone for STM32G4, If so, please can you confirm here?

    To help explain, I captured all these steps in a screen cast
    youtu.be/soTFIevQ9pQ


    Hardware:
    J-Trace Pro V1
    Firmware build: Jun 9 2020 13:40:26
    Serial Number: 751000037

    Registers:
    TRACE_IOEN=b'1, TRACE_MOD= b'11 - Which seems OK
    PORTE remains at power on defaults - Not OK?

    The debug shows no surprises, as a TRACKSCK is not being generated by the micro:

    Source Code

    1. Debug.Start();
    2. Device "STM32G474VE" selected.
    3. Found SW-DP with ID 0x2BA01477
    4. DPIDR: 0x2BA01477
    5. Scanning AP map to find all available APs
    6. AP[1]: Stopped AP scan as end of AP map has been reached
    7. AP[0]: AHB-AP (IDR: 0x24770011)
    8. Iterating through AP map to find AHB-AP to use
    9. AP[0]: Core found
    10. AP[0]: AHB-AP ROM base: 0xE00FF000
    11. CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    12. Found Cortex-M4 r0p1, Little endian.
    13. FPUnit: 6 code (BP) slots and 2 literal slots
    14. CoreSight components:
    15. ROMTbl[0] @ E00FF000
    16. ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    17. ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    18. ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    19. ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    20. ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    21. ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    22. Connected to target device.
    23. Reset: Halt core after reset via DEMCR.VC_CORERESET.
    24. Reset: Reset device via AIRCR.SYSRESETREQ.
    25. Elf.GetBaseAddr(); // returns 0x8000000
    26. Target.ReadU32 (0x08000000); // returns 0x20000460
    27. Target.SetReg ("SP", 0x20000460);
    28. Elf.GetEntryPointPC(); // returns 0x80014BC
    29. Target.SetReg ("PC", 0x80014BC);
    30. J-Link: Flash download: Bank 0 @ 0x08000000: Skipped. Contents already match
    31. Elf.GetBaseAddr(); // returns 0x8000000
    32. Target.ReadU32 (0x08000000); // returns 0x20000460
    33. Target.SetReg ("SP", 0x20000460);
    34. Elf.GetEntryPointPC(); // returns 0x80014BC
    35. Target.SetReg ("PC", 0x80014BC);
    36. Executed J-Link command "SelectTraceSource=1"
    37. Using dedicated IP streaming channel for max. trace throughput. J-Trace: IP 192.168.85.240:19030. Host IP: 192.168.85.33:64374.
    38. No trace clock present, trace may not work correctly.
    39. If application enables trace clock during execution, start of trace data may be missing.
    40. No trace clock present, trace may not work correctly.
    41. If application enables trace clock during execution, start of trace data may be missing.
    42. Startup complete (PC=0x08001084)
    Display All

    Any help / tips / pointer would be much appreciated..
    Thanks..

    The post was edited 3 times, last by jnewcomb ().

  • Some progress:
    Comparing registers on a working STM32F4 with the STM32G4, I noticed some registers are not getting initialized.
    I have managed to get a TRACECLK by forcing GPIOE values in the View->Registers windows.
    // MODER 0x00002AA0
    // OSPEEDR 0x00003FF0
    // PUPDR 0x00001550
    (I had to hunt for a STM32G474VE.svd file)

    Could the startup macro be writing to the old/wrong base address for PORTE?
    Note that address mapping are different for the STM32F and the STM32G, see below:
    STM32G4 GPIOE Address=0x48001000
    STM32F4 GPIOE Address=0x40021000

    Is it possible a default startup macro is not getting called for the STM32G4 series in Ozone?
    My follow on question is whats the cleanest / correct way to automate this?

    I need to provide this sort of startup logic..

    Source Code

    1. __var value;
    3. trace_gpio_speed = 0x3; // 3 (default) - Very High Speed
    4. //release GPIOE reset
    5. value = __readMemory32(0x4002102C, "Memory") & ~0x10;
    6. __writeMemory32(value, 0x4002102C, "Memory");
    7. //enable GPIOE clock
    8. value = __readMemory32(0x4002104C, "Memory");
    9. __writeMemory32(value | 0x10, 0x4002104C, "Memory");
    11. // bit 7,6,5 TRACE_MODE=11 TRACE_IOEN=1
    12. value = __readMemory32(0xE0042004, "Memory");
    13. __writeMemory32(value | 0xE0, 0xE0042004, "Memory");
    15. // Configure GPIOE 2,3,4,5,6 as AF
    16. value = __readMemory32(0x48001000, "Memory") & ~0x3FF0;
    17. __writeMemory32(value | 0x2AA0, 0x48001000, "Memory");
    19. // Configure GPIOE 2,3,4,5,6 output type push-pull
    20. value = __readMemory32(0x48001004, "Memory") & ~0x7C;
    21. __writeMemory32(value, 0x48001004, "Memory");
    23. // Configure GPIOE 2,3,4,5,6 No pull-up, pull-down
    24. value = __readMemory32(0x4800100C, "Memory") & ~0x3FF0;
    25. __writeMemory32(value, 0x4800100C, "Memory");
    27. // Configure GPIOE 2,3,4,5,6 Speed
    28. value = __readMemory32(0x48001008, "Memory") & ~0x3FF0;
    29. __writeMemory32(value | (0x1550 * trace_gpio_speed), 0x48001008, "Memory");
    31. // Enable mode AF0 for GPIOE 2,3,4,5,6
    32. value = __readMemory32(0x48001020, "Memory") & ~0x0FFFFF00;
    33. __writeMemory32(value, 0x48001020, "Memory");
    Display All
    I've tried modifying various .jdebug file macros with this:
    Target.WriteU32 (0x48001000, 0x2AA0);
    Target.WriteU32 (0x48001008, 0x3FF0);
    Target.WriteU32 (0x4800100C, 0x1550);
    Target.WriteU32 (0x48001010, 0x1FFE);
    (These values were read when debugging with IAR)
    ..but they just seems to get overwritten..

    The post was edited 2 times, last by jnewcomb ().

  • Hello,

    Thank you for your inquiry.
    To get trace up and running in Ozone you have to do the target specific trace pin init.
    We recommend to do this with a JLinkScript file and not within your target application during startup otherwise all trace data from the beginning of your application will be missing as no trace pins were active at that time.
    A general how to is explained here:
    wiki.segger.com/How_to_configu…t_files_to_enable_tracing

    We try to make as many target devices work out of the box as possible but can only verify this when evaluation boards with trace pins are available.
    For boards that we have in house and we can test we create the initialization and make them available here with example projects:
    segger.com/products/debug-prob…echnology/tested-devices/

    We also have a project for the STM32G474-EVAL board:
    wiki.segger.com/STM32G4#Tracing_on_ST_STM32G484

    Even though the board has actually a STM32G484 chip on it it should be compatible trace wise with the G474.
    Could you give the example project a try? Does it work on your hardware as well?

    If yes, simply use the .pex file from the example project in your own Ozone project and you should be able to trace that as well.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Using the pex file did the trick!
    I just didn't find that project in all my hunting, hopefully this will help others..

    I've got some different G series micros - please can you point me to a example or a jlinkscript file for any G4 series? While the pex file works, it would be nice to see what it does as I plan to have a bootloader, so it may need some edits, it may not..

    Many thanks for the support - Top rate as always!

    The post was edited 1 time, last by jnewcomb ().

  • Hello,

    Great to hear that you are up and running again.
    If you require the script file source feel free to open a support ticket here:
    segger.com/support/technical-support/

    However all our trace pex/scriptfiles do all changes in a read modify write fashion so whatever your bootloader sets up will not be touched.
    So there should be no need to edit anything. But you can of course request it if you desire. Just not all script files are available publicly.

    We will consider this thread as solved now.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.