Hi,

HELP!!!

I bought IAR J-Link Ultra today. But it couldn't work in IAR EWARM.

The error message:

Tue Jul 27 19:50:13 2010: Loaded macro file: C:\ARM\Merak\cfg\AT91SAM9260_SDRAM.mac
Tue Jul 27 19:50:14 2010: JLINK command: ProjectFile = C:\ARM\Merak\settings\Merak_SDRAM.jlink, return = 0
Tue Jul 27 19:50:14 2010: JLINK command: device = AT91SAM9260, return = 0
Tue Jul 27 19:50:14 2010: DLL version: V4.15u, compiled Jul 21 2010 19:07:11
Tue Jul 27 19:50:14 2010: Firmware: J-Link Ultra Rev.1 compiled Jun 17 2010 16:54:51
Tue Jul 27 19:50:14 2010: JTAG speed is initially set to: 32 kHz
Tue Jul 27 19:50:14 2010: Initial reset was performed
Tue Jul 27 19:50:14 2010: TotalIRLen = 4, IRPrint = 0x01
Tue Jul 27 19:50:14 2010: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Tue Jul 27 19:50:14 2010: CP15.0.1: 0x1D112112: ICache: 8kB (4*64*32), DCache: 8kB (4*64*32)
Tue Jul 27 19:50:14 2010: Cache type: Separate, Write-back, Format C (WT supported)
Tue Jul 27 19:50:14 2010: Found 1 JTAG device, Total IRLen = 4:
Tue Jul 27 19:50:14 2010: #0 Id: 0x0792603F, IRLen: 4, IRPrint: 0x1 ARM926EJ-S Core
Tue Jul 27 19:50:14 2010: J-Link found 1 JTAG device(s). ARM core Id: 792603F ARM9
Tue Jul 27 19:50:14 2010: Device at TAP0 selected
Tue Jul 27 19:50:15 2010: J-Link: ARM9 CP15 Settings changed: 51078 from 78, MMU Off, ICache On, DCache Off
Tue Jul 27 19:50:15 2010: ------------------------------ execUserPreload ---------------------------------
Tue Jul 27 19:51:02 2010: Fatal error: Read memory error @ address 0xFFFFFC30, word access: Memory access timeout. Session aborted!
Tue Jul 27 19:51:02 2010: C:\ARM\Merak\cfg\AT91SAM9260_SDRAM.mac(177,25): Error: Operation error.
Tue Jul 27 19:51:02 2010: Error while calling macro execUserPreload
Tue Jul 27 19:51:02 2010: Failed to load debugee: C:\ARM\Merak\SDRAM\Exe\Merak.out




The project and hardware are all OK, and I can use IAR J-Link V8 to debug it.

Tue Jul 27 19:52:25 2010: Loaded macro file: C:\ARM\Merak\cfg\AT91SAM9260_SDRAM.mac
Tue Jul 27 19:52:25 2010: JLINK command: ProjectFile = C:\ARM\Merak\settings\Merak_SDRAM.jlink, return = 0
Tue Jul 27 19:52:25 2010: JLINK command: device = AT91SAM9260, return = 0
Tue Jul 27 19:52:25 2010: DLL version: V4.15u, compiled Jul 21 2010 19:07:11
Tue Jul 27 19:52:25 2010: Firmware: J-Link ARM V8 compiled Jul 20 2010 18:54:59
Tue Jul 27 19:52:25 2010: JTAG speed is initially set to: 32 kHz
Tue Jul 27 19:52:25 2010: Initial reset was performed
Tue Jul 27 19:52:25 2010: TotalIRLen = 4, IRPrint = 0x01
Tue Jul 27 19:52:25 2010: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Tue Jul 27 19:52:25 2010: CP15.0.1: 0x1D112112: ICache: 8kB (4*64*32), DCache: 8kB (4*64*32)
Tue Jul 27 19:52:25 2010: Cache type: Separate, Write-back, Format C (WT supported)
Tue Jul 27 19:52:25 2010: Found 1 JTAG device, Total IRLen = 4:
Tue Jul 27 19:52:25 2010: #0 Id: 0x0792603F, IRLen: 4, IRPrint: 0x1 ARM926EJ-S Core
Tue Jul 27 19:52:25 2010: J-Link found 1 JTAG device(s). ARM core Id: 792603F ARM9
Tue Jul 27 19:52:25 2010: Device at TAP0 selected
Tue Jul 27 19:52:25 2010: J-Link: ARM9 CP15 Settings changed: 51078 from 78, MMU Off, ICache On, DCache Off
Tue Jul 27 19:52:25 2010: ------------------------------ execUserPreload ---------------------------------
Tue Jul 27 19:52:26 2010: ------------------------------- PLL Enable -----------------------------------------
Tue Jul 27 19:52:26 2010: ------------------------------- PLL Set at 100 MHz ----------------------------------
Tue Jul 27 19:52:26 2010: RTCK seems to be bridged with TCK
Tue Jul 27 19:52:26 2010: Auto JTAG speed: 8000 kHz
Tue Jul 27 19:52:26 2010: ------------------------------- SDRAM Done at 100 MHz -------------------------------
Tue Jul 27 19:52:26 2010: ----- AT91C_MATRIX_MRCR : 0x00000000
Tue Jul 27 19:52:26 2010: ------------------------------- The Remap is NOT & REMAP ----------------------------
Tue Jul 27 19:52:26 2010: ----- AT91C_MATRIX_MRCR : 0x00000003
Tue Jul 27 19:52:26 2010: ------------------------------- Watchdog Disable ------------------------------------
Tue Jul 27 19:52:26 2010: ---------------------------------------- Chip ID 0x019803A2
Tue Jul 27 19:52:26 2010: Chip ID for unknown !!
Tue Jul 27 19:52:26 2010: ---------------------------------------- Extention 0x00000000
Tue Jul 27 19:52:26 2010: RTCK seems to be bridged with TCK
Tue Jul 27 19:52:26 2010: Auto JTAG speed: 8000 kHz
Tue Jul 27 19:52:28 2010: 138380 bytes downloaded (70.86 Kbytes/sec)
Tue Jul 27 19:52:28 2010: Loaded debugee: C:\ARM\Merak\SDRAM\Exe\Merak.out
Tue Jul 27 19:52:28 2010: Target reset
Tue Jul 27 19:52:28 2010: ------------------------------ execUserReset ---------------------------------
Tue Jul 27 19:52:28 2010: ----- AT91C_MATRIX_MRCR : 0x00000003
Tue Jul 27 19:52:28 2010: ------------------------------- The Remap is done -----------------------------------
Tue Jul 27 19:52:28 2010: RTCK seems to be bridged with TCK
Tue Jul 27 19:52:28 2010: Auto JTAG speed: 8000 kHz
Tue Jul 27 19:52:28 2010: -------------------------------Set PC Reset ----------------------------------



The message in J-Link commander as below, it seems OK.

SEGGER J-Link Commander V4.15u ('?' for help)
Compiled Jul 21 2010 19:07:33
DLL version V4.15u, compiled Jul 21 2010 19:07:11
Firmware: J-Link Ultra Rev.1 compiled Jun 17 2010 16:54:51
Hardware: V1.00
S/N :
OEM : IAR
Feature(s) :
VTarget = 3.287V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: CP15.0.0: 0x41069265: ARM, Architecure 5TEJ
Info: CP15.0.1: 0x1D112112: ICache: 8kB (4*64*32), DCache: 8kB (4*64*32)
Info: Cache type: Separate, Write-back, Format C (WT supported)
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x0792603F, IRLen: 04, IRPrint: 0x1, ARM926EJ-S Core (Atmel)
Found ARM with core Id 0x0792603F (ARM9)
JTAG speed: 100 kHz
J-Link>



What's wrong with the J-Link Ultra?
Thanks!

OK, it works very well!!!

Thank you very much!!!!!