Hello,

Thank you for your inquiry.
Generally J-Link has Cortex-A5 debug support.
Which target device are you trying to connect to exactly?
Is it on an eval board or custom hardware?
For some devices extra init steps are necessary for J-Link to be able to connect to it.
Could you try the latest J-Link release version and see if the behaviour improves?
The attached picture shows a reference voltage of ~1.8 V. Is that an expected value?
If not it might be that the power delivery to the target is not sufficient.

Best regards,
Nino

Hi kahho,

How to enable or switch to different cores on a multi core device is very device specific and can't be answered generically.
Some cores need to be activated first through writes to the DAP or some SFRs through Core 0. Some others are already running but need to be accessed under another core base address by J-Link etc.
Unfortunately without any knowledge about your device we can't help here.
All tools needed to add support for new devices is part of the J-Link software package and the J-Link user guide UM08001.
To add the device configuration to J-Link the following guide can be used: wiki.segger.com/Adding_Support_for_New_Devices
In your case it is most likely a Flashless Cortes-A5 so you don't need to define a Flash loader, but Name, Coretype, RAM Address and if required (e.g. for the remaining cores) a JLinkScript handling the device specific setup. For each Core 0-x you would create such an entry so you can select each core by its specific device name through the J-Link software.

Should you need further assistance with your setup we recommend contacting us via our official support channels. More information can be found in my signature.

Best regards,
Nino