[SOLVED] RTT connection on STM32H7xxx - Cortex M7

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  • [SOLVED] RTT connection on STM32H7xxx - Cortex M7

    Hi

    I am struggling getting a stable RTT channel up and running on i STM32H7xx chip ( Cortex M7)

    The RTT block auto search function seems to search for the RTT block starting in address 0x24000000, but although the block is located in this area, it is not found by the server.

    If I configure the RTT block address manually in the Control Panel, it seems to be able to locate the block but no data is received.

    If I instead move the RTT block to DTCM area (starting at 0x20000000), and specify block address manually in the Control panel I am able to get data through.

    My question now is whether there is a limitation that requires the RTT block to be in located in DTCM memory in order for the background data access to work.

    If this is the case are there any command line options that can be given to the GDB server in order to specify the RTT area/range . (I would like to connect RTT viewer to existing debug session, without manually setting up the RTT address at each session)


    Best regards

    Anders

  • Hello Anders,

    RTT may only be used in memories that are accessible with the AHB. The AXI SRAM at 0x24000000 seems not to be accessible by AHB.
    The DTCM at 0x20000000 on the other hand is. That is why it is working there.
    EDIT: Running RTT from the AXI SRAM is working as well with the generic Embedded Studio startupt project as well.

    Aescov wrote:

    If this is the case are there any command line options that can be given to the GDB server in order to specify the RTT area/range . (I would like to connect RTT viewer to existing debug session, without manually setting up the RTT address at each session)
    You can use the same CL options as in J-Link Commander. It just needs to be passed differently for GDBServer. How is described in the J-Link user guide (UM08001) in Chapter RTT->FAQ.
    Attached is the excerpt.

    Best regards,
    Nino
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    Keep in mind, this is *not* a support forum.
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  • Hi Nino

    Thank you for your answer. I was not able to read from the ST documentation that internal SRAM was not accessible by AHB.

    However if this is the case it might make sense if you change the default search range for this chip family to search in the DTCM area.

    I manage to setup the search range with the GDB server command "monitor exec SetRTTSearchRanges 0x20000000 0x1FFFF" and it now seem to work as expected.

    Best regards
    Anders

  • Hello,

    The RTT block will be placed wherever the IDE you are using is linking the section to.
    This has nothing to do with J-Link but how you link your application.
    So there is no need for us to output this anywhere as the RTT block has been placed specifically by the user, so you should exactly know where you placed the RTT block.
    More information can be found in the J-Link user manual.

    As the initial question has been answered this thread will now be treated as solved.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.