[SOLVED]jflash programing

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  • [SOLVED]jflash programing

    hi,

    I'm recently working with the AT91SAM9G45. I try to use the Jflash to download the program to the external nor-flash on my board. I setup a new project taking the AT91SAM9263 project as a reference and also change the JFlash.cvs file adding the new chip MX29GL640EB in it.

    I test the project and it's working well when connecting with the arm core and the nor-flash can be operated and recongized. But there seems few problems woundering me.

    1. I can not specify the JTAG speed more than 5kHz, otherwise the connection could not be setup. The adaptive speed can work normally.

    2. The 9G45 has the same structure as 9263, the RAM address also starts from 0x300000 and the size is 64KB. Unfortunately, when I select the use target RAM, the operating to the flash such as earing, reading back could not work. the error echo is "Timeout while checking target RAM, core does not stop. Fail to ....."

    If I don't use the target RAM, everything seems fine but the speed is too slow to bear.

  • Hi fengzhang,

    >>1. I can not specify the JTAG speed more than 5kHz, otherwise the connection could not be setup. The adaptive speed can work normally.
    Do you perform a clock setup in your J-Flash init sequence (as done in the AT91SAM9263_CSB737.jflash project)?
    Since by default the SAM9G45 starts up with the internal RC oscillator (32 kHz) as CPU clock.
    On -S targets (as the ARM926EJ-S) the maximum JTAG speed which can be used is about 1/8 - 1/6 of the core speed (as in this case 5 kHz).
    Please not that even when performing a clock setup, "JTAG speed before init" has to be 5 kHz,
    since the clock setup itself is performed while the 32 kHz internal RC oscillator is used as clock source.

    >> 2. The 9G45 has the same structure as 9263, the RAM address also starts from 0x300000 and the size is 64KB.
    >> Unfortunately, when I select the use target RAM, the operating to the flash such as earing, reading back could not work.
    >> the error echo is "Timeout while checking target RAM, core does not stop. Fail to ....."
    Should not be the case.
    Could you please retry this using a higher CPU speed and JTAG speed (after performing the clock setup)?


    Best regards
    Alex
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