I have two timer interrupts which both use OS_Enter/OS_LeaveInterrupt. One has a higher priority than the other. Both are at lower priorities (higher values) than the fast interrupt. My understanding is that these routines disable interrupts that are not so-called fast interrupt. Using a scope I set two GPIOs high when entering these routines and low when leaving. I can clearly see the lower interrupt preempted by that with the higher priority.

From the Cortex-M EMBOS manual:

OS_EnterInterrupt() has to be used as prolog function, when the interrupt handler should not be preempted by any other interrupt handler that runs on a priority below the fast interrupt priority. An interrupt handler that starts with OS_EnterInterrupt() has to end with the epilog function OS_LeaveInterrupt().

From the RTOS header files where the macros are defined:

#define OS_ENABLE_INTS_SAVE_IPL() // Not required with Cortex-M, avoid call of OS_EI()

Are OS_EnterInterrupt and OS_EnterNestableInterrupt effectively the same on Cortex-M? Why is my interrupt above being preempted?