J-Flash ARM with AT91SAM9263

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  • J-Flash ARM with AT91SAM9263

    I am having problems trying to use J-Flash with my AT91SAM9263-EK evaluation board. The board comes with a pad that you can lay down a NOR flash chip on. It looks like the CPU might not be supported, is this correct? If so how hard would it be to be added. I am currently booting from the NOR flash chip, so there is not problem with the system.

    The following is the log from trying to connect:

    Connecting ...
    - Connecting via USB to J-Link device 0
    - J-Link firmware: V1.20 (J-Link ARM V6 compiled Dec 03 2007 17:34:18
    - Using adaptive clocking instead of fixed JTAG speed
    - Initializing CPU core (Init sequence) ...
    - Initialized successfully
    - Using adaptive clocking instead of fixed JTAG speed
    - J-Link found 1 JTAG device. Core ID: 0x0792603F (ARM9)
    - Reading CFI info ...
    - ERROR: Read memory error @ address 0x00000020, 512 bytes: Communication timeout.
    - ERROR: Target system has no power.
    - ERROR: Could not find supported CPU core on JTAG chain
    - ERROR: Failed to read CFI info
    - ERROR: Failed to connect

    Thanks in advance,

    Ken Woodland

  • Another Error after getting the latest version.

    Tobias,

    I downloaded the latest version from the link above, the name of the file was "Setup_JLinkARM_V387e.exe". J-Link was able to halt the processor and went to main. But when I execute the code, it always throw the error "Read memory error @ address 0x04000000, word access. Memory access timeout."

    [img]http://www.segger2.com/D:/Documents%20and%20Settings/encinasl/My%20Documents/My%20Pictures/Issue_JLink.bmp[/img]

    This is the log info:

    Fri Jul 18 16:24:26 2008: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\config\flashloader\ST\FlashSTR91x.mac
    Fri Jul 18 16:24:26 2008: DLL version: V3.87e, compiled Jul 17 2008 19:28:07
    Fri Jul 18 16:24:26 2008: Firmware: J-Link compiled Mar 3 2008 19:52:16 ARM Rev.5
    Fri Jul 18 16:24:26 2008: JTAG speed is initially set to: 32 kHz
    Fri Jul 18 16:24:26 2008: TotalIRLen = 17, IRPrint = 0x001129
    Fri Jul 18 16:24:27 2008: Using DBGRQ to halt CPU
    Fri Jul 18 16:24:27 2008: Resetting TRST in order to halt CPU
    Fri Jul 18 16:24:27 2008: CP15.0.0: 0x41259660: ARM, Architecure 5TE
    Fri Jul 18 16:24:27 2008: J-Link: ARM9, 966 core
    Fri Jul 18 16:24:27 2008: Software reset was performed
    Fri Jul 18 16:24:27 2008: Initial reset was performed
    Fri Jul 18 16:24:27 2008: J-Link found 3 JTAG devices. ARM core Id: 25966041
    Fri Jul 18 16:24:27 2008: Device at TAP0 selected
    Fri Jul 18 16:24:27 2008: Prepare hardware for download to the Flash
    Fri Jul 18 16:24:27 2008: TotalIRLen = 17, IRPrint = 0x001129
    Fri Jul 18 16:24:27 2008: CP15.0.0: 0x41259660: ARM, Architecure 5TE
    Fri Jul 18 16:24:27 2008: J-Link: ARM9, 966 core
    Fri Jul 18 16:24:27 2008: Hardware reset with strategy 0 was performed
    Fri Jul 18 16:24:27 2008: RTCK reaction time is approx. 126ns
    Fri Jul 18 16:24:27 2008: Auto JTAG speed: Adaptive
    Fri Jul 18 16:24:28 2008: 11140 bytes downloaded (18.82 Kbytes/sec)
    Fri Jul 18 16:24:28 2008: Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\config\flashloader\ST\FlashSTR91x.out
    Fri Jul 18 16:24:28 2008: Target reset
    Fri Jul 18 16:24:28 2008: The boot code reside in BANK 0
    Fri Jul 18 16:24:30 2008: Program exit reached.
    Fri Jul 18 16:24:31 2008: 4920 bytes downloaded into FLASH (1.45 Kbytes/sec)
    Fri Jul 18 16:24:31 2008: Loaded debugee: D:\IAR\ARM912\Code\SSP\Debug\Exe\ssp.out
    Fri Jul 18 16:24:31 2008: Target reset


    Fri Jul 18 16:24:28 2008: The boot code reside in BANK 0
    Fri Jul 18 16:24:30 2008: Program exit reached.
    Fri Jul 18 16:24:31 2008: 4920 bytes downloaded into FLASH (1.45 Kbytes/sec)
    Fri Jul 18 16:24:31 2008: Loaded debugee: D:\IAR\ARM912\Code\SSP\Debug\Exe\ssp.out
    Fri Jul 18 16:24:31 2008: Target reset
    Fri Jul 18 16:26:25 2008: Fatal error: Read memory error @ address 0x04000000, word access: Memory access timeout.

    Session aborted!
    Fri Jul 18 16:26:26 2008: The stack 'CSTACK' is filled to 100% (2048 bytes used out of 2048). The warning threshold is set to 90.%
    Fri Jul 18 16:26:26 2008: The stack 'SVC_STACK' is filled to 100% (256 bytes used out of 256). The warning threshold is set to 90.%
    Fri Jul 18 16:26:26 2008: The stack 'IRQ_STACK' is filled to 100% (1024 bytes used out of 1024). The warning threshold is set to 90.%
    Fri Jul 18 16:26:26 2008: The stack 'FIQ_STACK' is filled to 100% (256 bytes used out of 256). The warning threshold is set to 90.%
    Fri Jul 18 16:26:26 2008: The stack 'UND_STACK' is filled to 100% (256 bytes used out of 256). The warning threshold is set to 90.%
    Fri Jul 18 16:26:26 2008: The stack 'ABT_STACK' is filled to 100% (256 bytes used out of 256). The warning threshold is set to 90.%
    Fri Jul 18 16:26:27 2008: Warning: Code still contains old breakpoints

  • Are you sure this is a problem with the latest Beta (V3.87e)of the J-Link
    software and not a problem in your application ?

    In other words: If you use the version of the DLL that came with the IAR workbench,
    does the problem disappear ?

    Thanks,
    Rolf
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • You are correct.

    Rolf,

    Thanks for your prompt response, this is real good customer service.

    You are correct, this was a problem in my code. Installing the latest version of J-Link fixed the initial problem. Thank you very much...



    Best regards,

    :)