[SOLVED] RAM Error Programming TI TM4123GH6PM MCU, 5.12e vs 5.12g

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  • [SOLVED] RAM Error Programming TI TM4123GH6PM MCU, 5.12e vs 5.12g

    I am trying to program a TI TM4C123GH6PM MCU with a J-Link device. Details below.


    SEGGER J-Link Commander V5.12e (Compiled Apr 29 2016 15:04:36)
    DLL version V5.12e, compiled Apr 29 2016 15:03:58

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46
    Hardware version: V8.00
    S/N: 158007855
    OEM: IAR
    VTref = 0.000V


    Type "connect" to establish a target connection, '?' for help
    J-Link>

    I am successfully using the above J-Link device with IAR ARM development tools to the same processor and board.

    I am able to connect to the board.

    But anytime I access Flash, read or write, I get a RAM error.

    However, when I use version 5.12g of J-Flash I have no problems.

    Looking in the release notes I do not see a distinction between 5.12e and 5.12g, as was documented in previous versions, just version 5.12.

    Have I missed some additional documentation?

  • Hi,


    This it the change log of 5.12f:

    C Source Code

    1. - Added J-Link RTT Logger to OSX and Linux packages.
    2. - DLL: Added missing interface types to control panel.
    3. - DLL: Debugging with longer JTAG chains did not work properly. Fixed.
    4. - DLL: For ARMv8M Baseline and Mainline presence of security extension was not detected properly. Fixed.
    5. - DLL: For ARMv8M Baseline and Mainline were not distinguished correctly. Fixed.
    6. - DLL: If exec string "SetCPUConnectIDCODE" was issued, it could happen that "unknown command" error was returned. Fixed.
    7. - DLL: J-Link script files: Added global DLL variable CORESIGHT_AHBAPCSWDefaultSettings to allow override of AHB-AP CSW settings for Cortex-M devices that do not work with J-Link defaults.
    8. - DLL: When programming the IDCODE on Renesas Synergy S1 and S3 series CPUs, verify errors could occur. Fixed.
    9. - Firmware: Improved timing for SWD interface to avoid problems with higher frequencies when using a J-Link SWD Isolator.
    10. - Firmware: J-Trace Cortex-M V3: Added ARMv8M support.
    11. - Firmware: Improved timing for SWD interface to avoid problems with higher frequencies when using a J-Link SWD Isolator.
    12. Affected firmwares: Flasher ARM V4
    13. Flasher PRO V4
    14. Flasher Portable V1
    15. - Firmware: Max SWD speed of 12 MHz did not work properly. Fixed.
    16. Affected firmwares: Flasher ARM V4
    17. Flasher PRO V4
    18. Flasher Portable V1
    19. - Firmware: Flasher: Flashing with longer JTAG chains did not work properly. Fixed.
    20. Affected firmwares: Flasher ARM V4
    21. Flasher PRO V4
    22. Flasher RX V4
    23. Flasher PPC V4
    24. Flasher Portable V1
    25. - Firmware: When using the SPI protocol (e.g. in J-Flash SPI) and reading data from the target device, it could happen that the USB communication hang. Fixed.
    26. Affected firmwares: J-Link EDU, BASE, PLUS V9
    27. J-Link EDU, BASE, PLUS V10
    28. J-Link ULTRA,+, PRO V4
    29. - Firmware: J-Trace PRO V1 Cortex-M: In classic post-mortem backtrace mode, if debugger requested more trace data than available, incorrect trace data was returned by J-Trace PRO. Fixed.
    30. Could lead to "failed to read trace data" message in Keil uVision (MDK-ARM).
    31. Affected firmwares: J-Link EDU, BASE, PLUS V10
    32. - J-Flash SPI: Changed default delay after power up from 20ms to 200ms as 20ms was to short for most SPI flashes.
    33. - J-Flash SPI: Manually specifying flash parameters did not work properly. Fixed.
    34. - J-Flash SPI: Under special circumstances, blank check did not work properly. Fixed.
    35. - J-Flash SPI: removed automatically created init step
    36. - J-Flash: Fixed flash base address of Atmel SAME70xxxx devices.
    37. - J-Flash: Flashing with longer JTAG chains did not work properly. Fixed.
    38. - J-Flash: Micronas HVC4223F: erased value of NVRAM was not set to "undefined" which caused problems with blank check operations. Fixed.
    39. - J-Flash: Renesas Synergy S1: Programming of option setting memory was not possible. Fixed.
    40. - J-Flash: When programming the IDCODE on Renesas Synergy S1 and S3 series CPUs, verify errors could occur. Fixed.
    41. - J-Link User Guide: Updated section "J-Link script files".
    42. - RTT: SEGGER_RTT_printf() did not call va_end(). Fixed.
    43. - RTTViewer: Added command line parser, added more options for RTT configuration.
    44. - RTTViewer: Added terminal logging, configurable buffer size, does no longer automatically close if disconnected, changed shortcuts to avoid conflicts, fixed auto-scroll, fixed all terminal output
    45. - RTTViewer: Changed method for writing to all terminals window, removed menu for setting of terminal buffer size.
    46. - Software package: RTT Files did not compile if compiled with C++ compiler.
    Display All


    This is the change log of version 5.12e

    - DLL: Very old versions of IAR EWARM (e.g. V4.40a) did not pass a device to the J-Link DLL which resulted in the device selection dialog popped up for each debug session start. Fixed.
    - DLL (Windows): Under special circumstances WSACleanup() was called more often than WSAStartup() which could cause problems if the host process that loaded the DLL also used the socket API.
    - J-Flash: Flash programming of the auxillary space did not work for SAMD20. Fixed.


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    Best regards,
    Niklas
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