Hello!
I`am using J-link v5.0 emulator and JFlashARM v4.00a software with STM32 Cortex-M3 microcontroller.
And I have noticed recently, that there is absolutely no activity on the JTAG RESET pin (target CPU reset signal) while connection is in progress!
Reset options is on the picture:
Emulator connects to the core without lowering RESET level.
This is why the core peripherals stays in it`s firmware configured state, and this is the root of the problems I have reported earlier!
Solution is to set value0 in the reset type options to 2.
But why the default type 0 did`nt work properly?
I`am using J-link v5.0 emulator and JFlashARM v4.00a software with STM32 Cortex-M3 microcontroller.
And I have noticed recently, that there is absolutely no activity on the JTAG RESET pin (target CPU reset signal) while connection is in progress!
Reset options is on the picture:
Emulator connects to the core without lowering RESET level.
This is why the core peripherals stays in it`s firmware configured state, and this is the root of the problems I have reported earlier!
Solution is to set value0 in the reset type options to 2.
But why the default type 0 did`nt work properly?
The post was edited 3 times, last by sonycman ().