J-Link commander CFI Flash

Veit_Kannegieser · Jun 26th 2015, 8:40pm

J-Link commander CFI flash does not work for us in the 5.0Xx versions, 4.98 is fine.
so this works:
"C:\Program Files\SEGGER\JLink_V498d\JLink.exe" -Speed 50000 -Device CORTEX-A9 -CommanderScript production_VEIT_9999_td_nor_m_jlink_.jlink

but this one not:
"C:\Program Files\SEGGER\JLink_V501a\JLink.exe" -Speed 50000 -Device CORTEX-A9 -CommanderScript production_VEIT_9999_td_nor_m_jlink_.jlink

The commader script is:

Source Code

r
log .\logfile
exec setcfiflash 0xE0000000 - 0xE1FFFFFF
exec setworkram 0x00100000 - 0x00107FFF
w4 0x3B500028, 0xE7FF7FFF
w4 0x3C400000, 0x00000021
w4 0x3C400020, 0x03070702
w4 0x3C400040, 0x001F0000
mem 0xE0000000,0x100
loadbin production_VEIT_9999_td_nor_m.bin,0xE0000000
mem 0xE0000000,0x100
q

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The output in bad case case is

Source Code

SEGGER J-Link Commander V5.01a ('?' for help)
Compiled Jun 12 2015 19:03:08
Script file read successfully.
Info: Device "CORTEX-A9" selected.
DLL version V5.01a, compiled Jun 12 2015 19:02:36
Firmware: J-Link Ultra Rev.1 compiled Dec 3 2013 14:27:53
Hardware: V1.00
S/N: 501200384
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
VTarget = 3.203V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: ARM AP[0]: 0x44770001, AHB-AP
Info: ARM AP[1]: 0x24770002, APB-AP
Info: ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-003BB906 ECT / CTI
Info: ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-004BB912 TPIU
Info: ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-001BB908 CSTF
Info: ROMTbl 0 [3]: 00020003, CID: B105100D, PID:04-000BB4A9 ROM Table
Info: ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-000BBC09 Cortex-A9
Info: Found Cortex-A9 r3p0
Info: 6 code breakpoints, 4 data breakpoints
Info: Debug architecture ARMv7.0
Info: Data endian: little
Info: Main ID register: 0x413FC090
Info: I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Info: D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Info: System control register:
Info: Instruction endian: little
Info: Level-1 instruction cache disabled
Info: Level-1 data cache disabled
Info: MMU disabled
Info: Branch prediction disabled
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x4BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-A9 identified.
Target interface speed: 25000 kHz
Processing script file...
Reset delay: 0 ms
Reset type NORMAL: Toggle reset pin and halt CPU core.
Writing E7FF7FFF -> 3B500028
Writing 00000021 -> 3C400000
Writing 03070702 -> 3C400020
Writing 001F0000 -> 3C400040
E0000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000040 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000050 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000060 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000070 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000080 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000090 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000A0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000B0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000C0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000D0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000E0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000F0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
Downloading file [production_VEIT_9999_td_nor_m.bin]...O.K.
E0000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000040 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000050 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000060 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000070 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000080 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000090 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000A0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000B0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000C0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000D0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000E0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000F0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
Opening binary file for writing... [production_VEIT_9999_td_nor_m.bin_]
Reading 65536 bytes from addr 0xE0000000 into file...O.K.
Reset delay: 0 ms
Reset type NORMAL: Toggle reset pin and halt CPU core.
Script processing completed.

Display All

and there is no progress bar.

In the good / 4.98 case, with a flash download progress bar:

Source Code

SEGGER J-Link Commander V4.98d ('?' for help)
Compiled Apr 28 2015 13:58:44
Script file read successfully.
Info: Device "CORTEX-A9" selected.
DLL version V4.98d, compiled Apr 28 2015 13:58:23
Firmware: J-Link Ultra Rev.1 compiled Dec 3 2013 14:27:53
Hardware: V1.00
S/N: 501200384
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
VTarget = 3.203V
Info: TotalIRLen = 4, IRPrint = 0x01
Info: ARM AP[0]: 0x44770001, AHB-AP
Info: ARM AP[1]: 0x24770002, APB-AP
Info: ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-003BB906 ECT / CTI
Info: ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-004BB912 TPIU
Info: ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-001BB908 CSTF
Info: ROMTbl 0 [3]: 00020003, CID: B105100D, PID:04-000BB4A9 ROM Table
Info: ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-000BBC09 Cortex-A9
Info: Found Cortex-A9 r3p0
Info: 6 code breakpoints, 4 data breakpoints
Info: Debug architecture ARMv7.0
Info: Data endian: little
Info: Main ID register: 0x413FC090
Info: I-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Info: D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Info: System control register:
Info: Instruction endian: little
Info: Level-1 instruction cache disabled
Info: Level-1 data cache disabled
Info: MMU disabled
Info: Branch prediction disabled
Found 1 JTAG device, Total IRLen = 4:
#0 Id: 0x4BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
Cortex-A9 identified.
Target interface speed: 25000 kHz
Processing script file...
Reset delay: 0 ms
Reset type NORMAL: Toggle reset pin and halt CPU core.
Writing E7FF7FFF -> 3B500028
Writing 00000021 -> 3C400000
Writing 03070702 -> 3C400020
Writing 001F0000 -> 3C400040
E0000000 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000010 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000020 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000030 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000040 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000050 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000060 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000070 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000080 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0000090 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000A0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000B0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000C0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000D0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000E0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E00000F0 = FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
Downloading file [production_VEIT_9999_td_nor_m.bin]...Info: J-Link: Flash download: Flash programming performed for 1 range (7471104 bytes)
Info: J-Link: Flash download: Flash contents already match. Download into CFI flash skipped
Info: J-Link: Flash download: Total time needed: 111.586s (Prepare: 0.135s, Compare: 17.450s, Erase: 32.262s, Program: 44.168s, Verify: 17.536s, Restore: 0.034s)
O.K.
E0000000 = 00 F0 20 E3 1D 00 00 EA 00 F0 20 E3 46 4C 42 48
E0000010 = 00 00 00 00 00 00 02 EC 35 30 34 30 30 30 30 39
E0000020 = 36 33 35 37 00 00 00 00 00 00 00 00 00 00 00 00
E0000030 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 07
E0000040 = 4A 75 6E 20 20 33 20 32 30 31 35 00 31 32 3A 35
E0000050 = 39 3A 33 39 00 56 45 49 54 00 00 00 00 00 39 39
E0000060 = 39 39 00 42 54 53 52 00 00 00 00 00 00 00 00 00
E0000070 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
E0000080 = 00 00 00 E3 20 00 4D E3 01 1C 80 E2 AA 2A 0A E3
E0000090 = AA 2A 4A E3 02 30 A0 E1 02 40 A0 E1 02 50 A0 E1
E00000A0 = 3C 00 80 E8 10 00 80 E2 01 00 50 E1 FB FF FF 1A
E00000B0 = 00 D0 A0 E1 5D 00 00 EB 00 F0 A0 E1 01 20 A0 E3
E00000C0 = 00 00 50 E3 07 20 A0 13 00 00 51 E3 08 20 82 13
E00000D0 = 01 00 A0 E3 10 20 82 E3 1E 0F 09 EE 3E 01 A0 E3
E00000E0 = 5E 0F 09 EE 1C 2F 09 EE 3C 0F 09 EE 7C 0F 09 EE
E00000F0 = 1E FF 2F E1 B8 21 9F E5 28 00 A0 E3 00 00 82 E5
Script processing completed.

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Is there anything to change on the script?

SEGGER - Erik · Jul 6th 2015, 11:39pm

Hi,

In general, we are not aware of any issues regarding flash download in CFI flashes on Cortex A9
What target device are you using? We will check if we can reproduce this behavior.

- Erik

Veit_Kannegieser · Jul 20th 2015, 12:17pm

Hello Erik,

SEGGER - Erik wrote:

What target device are you using? We will check if we can reproduce this behavior.

Fujitsu/Socionext Emerald-L (ES4) on our own board, which should be quite close to the MB86R11EVB.
Flash chip is: <micron.com/parts/nor-flash/parallel-nor-flash/m29w256gh7an6f>

regards

Veit_Kannegieser · Sep 3rd 2015, 6:00pm

Problem still exist with 5.02.
Looking in the logfiles the main difference is when the Download is done:

4.98d:
T0ACC 000:982 JLINK_DownloadFile()JLINK_BeginDownload(Flags = 0x00) (0000ms, 0982ms total)
T0ACC 000:982 JLINK_WriteMem(0xE0000000, 0x003B Bytes, ...) - Data: 6B 6A 73 64 61 68 6B 6C 73 6A 64 68 66 6C 61 6B ... returns 0x3B (0001ms, 0983ms total)
T0ACC 000:982 JLINK_EndDownload() -- -------------------------------------- -- Start of preparing to read CFI info -- End of preparing to read CFI info -- Start of determining dirty areas in flash cache -- End of determining dirty areas -- Start of preparing flash programming -- End of preparing flash programming -- CPU speed could not be measured. -- Start of comparing flash -- CRC check was estimated as fastest method
-- Comparing range 0xE0000000 - 0xE001FFFF (1 Sector, 128 KB), using single-block CRC calculation -- CRC does not match for sector 0 -- End of comparing flash -- Start of erasing sectors -- Erasing range 0xE0000000 - 0xE001FFFF (001 Sector, 128 KB) -- End of erasing sectors -- Start of flash programming -- Programming range 0xE0000000 - 0xE001FFFF (001 Sector, 128 KB) -- End of flash programming -- Flash programming performed for 1 range (131072 bytes) -- 0xE0000000 - 0xE001FFFF (001 Sector, 128 KB)
-- Start of verifying flash -- Checksum calculation was estimated as fastest method -- End of verifying flash -- Start of restoring -- End of restoring -- Flash contents already match. Download into CFI flash skipped -- Flash download into CFI flash skipped. Flash contents already match -- Total time needed: 2.057s (Prepare: 0.323s, Compare: 0.309s, Erase: 0.841s, Program: 0.205s, Verify: 0.310s, Restore: 0.067s) returns 0x20000 (2180ms, 3162ms total)
T0ACC 000:982 returns 0x00 (2180ms, 3162ms total)
T0ACC 003:163 JLINK_SetResetDelay(0) (0000ms, 3162ms total)

5.02:
T0558 000:791 JLINK_DownloadFile()JLINK_BeginDownload(Flags = 0x00) (0000ms, 0791ms total)
T0558 000:791 JLINK_WriteMem(0xE0000000, 0x003B Bytes, ...) - Data: 6B 6A 73 64 61 68 6B 6C 73 6A 64 68 66 6C 61 6B ... -- CPU_WriteMem(59 bytes @ 0xE0000000) returns 0x3B (0004ms, 0795ms total)
T0558 000:791 JLINK_EndDownload() returns 0x00 (0004ms, 0795ms total)
T0558 000:791 returns 0x00 (0004ms, 0795ms total)
T0558 000:795 JLINK_SetResetDelay(0) (0000ms, 0795ms total)

tron · Sep 3rd 2015, 9:58pm

I just logged in today to post the very same problem for both v5.00d and v5.02 working with a MB86R01 (Jade). However I was able to workaround it by installing v4.82 (skipped install of drivers) and then just point my batch script to flash using the older JLink.exe file and it wrote to the CFI flash successfully.

I've attached the log files that show the differences between the two, mainly loadbin just reports ...O.K. at the end without actually doing anything in v5.00d/v5.02 while in v4.82 the flash progress dialog shows up and reports progress and actually does modify flash as expected. And also the JLink script file we're using.

Edit: Forgot to mention the board is using Spansion S29GL256P NOR Flash chip, of which is the CFI flashing target.

Veit_Kannegieser · Sep 23rd 2015, 12:47pm

Tried yesterday with 5.02d, and after some playing with the J-Link Control panel "Override device selection"..., page settings i found that the changes are not persistent for next call of jlink.exe, i added the -SettingsFile bla.jlink to the command line.

This alone does not help, however when doing any change, like "Modify breakpoints during execution" to "Do not allow",
the changes done by commands
exec setcfiflash 0xE0000000 - 0xE1FFFFFF
exec setworkram 0x00100000 - 0x00107FFF
result in bla.jlink change

BPDuringExecution = 0 -> 3

CFISize = 0x00 -> 0x2000000
CFIAddr = 0x00 -> 0xE0000000

EnableFlashDL = 2 -> 1

WorkRAMSize = 0x00 -> 0x8000
WorkRAMAddr = 0x00 -> 0x100000

And on next invocation the flash compare/erase/program/verify progress bar is visible again.

I works even when having
EnableFlashDL = 2
BPDuringExecution = 0
again.

So i suspect a change in J-Link 4.xx -> 5.00 that the
exec setcfiflash ...
exec setworkram ...
commands are not effective directly anymore.

Source Code

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