QSPI parallel mode flash programming support for Vybrid Cortex-A5 devices

hafizqasim · Jun 2nd 2015, 10:03am

Hi,

I have seen in JLINK release notes that

DLL/J-Flash: QSPI flash programming support for Vybrid Cortex-A5 devices added.
DLL/J-Flash: QSPI parallel mode flash programming support for Vybrid Cortex-A5 devices added.

I am working on QSPI Parallel Mode Flash support on Vybrid Cortex A5 board. Without Parallel mode, I am successfully programming the image and my board is booting.

For enabling QSPI Parallel Mode, What should I do for programming the image?

I have JLINK Pro. version 4.3
Firmware version is 4.98e.
For JFlash, I am using VF6xx_A5.jflash file.

Should I use different Jflash file?
Should I change Jflash file for parallel mode?

How can I instruct the JFlash to enable Parallel Mode?

Regards

SEGGER - Erik · Jun 10th 2015, 10:15am

Hi,

You have to select "Freescale VF6xx_A5_ParallelMode" as target device in the J-Flash project settings (CPU -> Device).
In the sample project, it is pre-configured to "VF6xx_A5".

- Erik

hafizqasim · Jun 11th 2015, 9:21am

Hi,

I have tested by changing the chip name in .jflash device as "Freescale VF6xx_A5_ParallelMode" but the device does not boot.
When I change the QSPI Boot configuration parameter to Parallel Mode enabled, it does not work/boot.
JFlash works well in non parallel mode (single mode) but does not work in parallel mode.

Can we expect Parallel QSPI mode support in JFlash for Cortex A5 in near future?

Regards

SEGGER - Erik · Sep 14th 2015, 12:31pm

Hi,

Parallel mode is already supported in J-Flash. Did you make sure that programmed data file contains a valid header and application? Booting in parallel mode is some kind of tricky. During boot process, the Vybrid boot loader reads back the header from the QSPI in single SPI mode. Depending on the header, the Vybrid reads / executes the application either in single or parallel SPI mode.

Therefore, for booting in parallel SPI mode on the Freescale Vybrid device, you have to make sure that:
a) a valid header is programmed in single mode
b) a valid application is programmed in parallel mode at the application start address used by the boot loader

Further / detailed information about the boot process in parallel mode can be found here:
community.freescale.com/thread/309037

Please find attached a sample data file which has been built for the TWR-VF65GS10 Vybrid board. It contains a valid header + application to boot from parallel flash. Simply program the data file using J-Flash or J-Link Commander (device: VF6xx_A5_ParallelMode).

Best regards
Erik

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