"unable to halt ARM core" happenned with AT91SAM7X256

vqhung · Sep 4th 2008, 10:06am

I got an error when I download the code to ARM AT91SAM7X256 via Atmel SAM-ICE. There are two error messages:

1. Unable to halt ARM core.

FATAL ERROR
Scan chain length is expected to be 4 or 5. Found(0)

Session aborted.

OR

2. Unable to halt ARM core.

Failed to load flash loader: .......\FlashAT91SAM7X.d79

and here is its log

Thu Sep 04 16:21:20 2008: Loaded macro file: D:\Program Files\IAR Systems\Embedded Workbench 4.0 Evaluation\ARM\config\flashloader\Atmel\FlashAT91SAM7X.mac
Thu Sep 04 16:21:20 2008: DLL version: V3.56f, compiled Dec 7 2006 19:47:04
Thu Sep 04 16:21:20 2008: Firmware: J-Link ARM V6 compiled Jul 30 2008 11:24:59
Thu Sep 04 16:21:20 2008: JTAG speed is initially set to: 32 kHz
Thu Sep 04 16:21:20 2008: Halting CPU core
Thu Sep 04 16:21:20 2008: Using DBGRQ to halt CPU
Thu Sep 04 16:21:20 2008: Resetting TRST in order to halt CPU
Thu Sep 04 16:21:21 2008: Halting CPU core
Thu Sep 04 16:21:21 2008: Using DBGRQ to halt CPU
Thu Sep 04 16:21:21 2008: Resetting TRST in order to halt CPU
Thu Sep 04 16:21:41 2008: Unable to halt ARM core
Thu Sep 04 16:21:41 2008: Failed to load flash loader: D:\Program Files\IAR Systems\Embedded Workbench 4.0 Evaluation\ARM\config\flashloader\Atmel\FlashAT91SAM7X.d79

Please help me out with possible solutions.

Hung Vo

SEGGER - Rolf · Sep 4th 2008, 9:50pm

You probably put the CPU in some state in which JTAG is disabled or blocked for some other reason.
For ATMEL AT91SAM7 devices, you should use the ERASE Pin to erase the chip and you should be back in business.

With SAM7 devices, this is in a lot of cases the only way to gain control of the CPU since nRESET is per default disabled
(A bit of a strange design).

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