[Halt at boot time problem]

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  • [Halt at boot time problem]

    Hello,
    I'm having a problem halting the ARM1136JF-S.Facts :
    -the CPU is located on an CT1136JF-S CoreTile
    -the CoreTile is connected to a V5IP700 HighTechGlobal FPGA prototyping
    board.
    -the ARM CPU is booting from a flash memory.This flash memory has never
    been written with valid data.In order to write the flash memory :
    1. First i have to store a Linux booting image in the on board
    SDRAM.
    2.Second I have to store the flash writing program in FPGA's
    internal RAM and run the program.
    3.When I run the program stored in FPGA's internal RAM, the Linux
    booting image is written in the Flash memory from the on board SDRAM.
    4.And then restart board, the Linux would be loaded.
    I think that that the ARM CPU is not halted because each time I apply a hardware reset on the FPGA board and to the ARM CPU the PC read with J-Link Commander is not the same.From what I read in the JLinkARM specification I understood that after reset is released J-Link will automatically halt the CPU before execution any instruction.So i don't know what I'm doing wrong.