I just received a new J-Link module (they're in short supply here). I have updated to the latest driver (2.6.8.2). When I connect up to the STM32F103 (using the IAR IDE), it pops up a warning message, saying:
I don't know what divisors the STM32 chip uses, it doesn't seem to be as regular as the J-link (6000 KHz, 3529, 2400, 1818, 1500 KHz - the best I can come up with is 60MHz/n, where n=(8+2), (16+1), (24+1), (32+1), 40).
At 1500 KHz, both sides seem to be happy (the current design doesn't allow for SWO output anyway, but the pop-up message was annoying, and we do plan to allow that in future designs).
Questions: At 1500 KHz, will that noticeably slow down printf output? Does this affect SWC? And why is the new J-link behaving differently than our other units?
Disregarding the 3 extra zeros on the 2nd to last line, with some experimentation of setting the desired SWO speed, it appears the J-Link has values of n=8, 16,24,32,40... This is a bit odd, because according to the specs, the maximum SWO speed is 6 MHz, a speed that the J-Link totally skips over in practice.J-Link V4.501 Internal Error
API Error: Debugger selected a SWO Speed of 6000kHz.
J-Link is capable of speeds 60000KHz / n, n min. = 8
Closest speeds are 7500kHz and 3750000kHz. Max. permitted deviation is 3%
SWO can not be used with the currently selected speed
I don't know what divisors the STM32 chip uses, it doesn't seem to be as regular as the J-link (6000 KHz, 3529, 2400, 1818, 1500 KHz - the best I can come up with is 60MHz/n, where n=(8+2), (16+1), (24+1), (32+1), 40).
At 1500 KHz, both sides seem to be happy (the current design doesn't allow for SWO output anyway, but the pop-up message was annoying, and we do plan to allow that in future designs).
Questions: At 1500 KHz, will that noticeably slow down printf output? Does this affect SWC? And why is the new J-link behaving differently than our other units?