I have a J-Link JTAG SWD + SWO. The IDE is IAR 6.0. The J-Link is connected to use the 2-wire serial interface. Communications to/from the J-Link seem to be OK. I believe my program successfully loaded in a previous attempt but I don't have a record of the log for that and I have yet to see anything running. The first error that comes up is



"Can not read register 15 (R15) while CPU is running."



As far as I know I have everything set-up in the IDE. I am doubtful over the value of the CPU clock in J-Link/J-Trace set-up which defaults to 72.0MHz. The selected micro cannot run at this speed, but changing the value to 14MHz makes no difference. The Debug log is included below. Any help would be much appreciated.


Debug Log Window
Wed Jan 25, 2012 10:26:09: JLINK command: ProjectFile = C:\WorkSpace\current_project\settings\current_project_Debug.jlink, return = 0

Wed Jan 25, 2012 10:26:09: Device "EFM32TG210F32" selected (32 KB flash, 4 KB RAM).

Wed Jan 25, 2012 10:26:09: JLINK command: device = EFM32TG210F32, return = 0

Wed Jan 25, 2012 10:26:09: DLL version: V4.36f, compiled Oct 22 2011 15:21:42

Wed Jan 25, 2012 10:26:09: Firmware: J-Link ARM V8 compiled Sep 22 2011 16:23:23

Wed Jan 25, 2012 10:26:09: Selecting SWD as current target interface.

Wed Jan 25, 2012 10:26:09: JTAG speed is initially set to: 32 kHz

Wed Jan 25, 2012 10:26:09: Found SWD-DP with ID 0x2BA01477

Wed Jan 25, 2012 10:26:09: TPIU fitted.

Wed Jan 25, 2012 10:26:09: FPUnit: 6 code (BP) slots and 2 literal slots

Wed Jan 25, 2012 10:26:09: Found Cortex-M3 r2p1, Little endian.

Wed Jan 25, 2012 10:26:09: Hardware reset with strategy 0 was performed

Wed Jan 25, 2012 10:26:09: Initial reset was performed

Wed Jan 25, 2012 10:26:16: Fatal error: Can not read register 15 (R15) while CPU is running Session aborted!

Wed Jan 25, 2012 10:26:16: Failed to load debugee: C:\WorkSpace\current_project\Debug\Exe\current_project.out

I have found the problem. It was a hardware fault on the target board which meant that the micro was not getting a supply. The J-Link must have been supplying enough power through the signal lines in order to determine the chip type! The reset line was sitting at 0.5V below supply and hardly moved when the J-Link was trying to exercise it. Disconnecting the target board had shown a good full supply voltage swing of the reset signal.