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What device do you use? What J-Link model? Are further J-Link purchases planned if this feature is going to be supported?

As GDB Server already tries to halt the core at startup of GDB Server, a monitor command would be too late. As GDB as one of the first things requests the CPU registers, the core must be halted at the time GDB connects to GDB Server. I recommend to use a script file with an InitTarget() function and do the DMI accesses there.

Hi, What do you mean with „I do not understand“? RTCK is important for ARM7/9 only but the EDU Mini does not support ARM7/9, so why should RTCK even be implemented on the EDU mini?… No, we did not test the mini explicitly with a Pi. The v8-AR support is shared code and has been tested on v8-AR based cores before, so it is known to be working. As in your case even the very very very low-level JTAG communication does not work (before ANY core-specific stuff comes into play), I am 99.99% confident …

The description is relatively useless… What core do you have implemented in your FPGA (M0/M3/M4/M7/…)? What are you downloading to, emulated flash that requires a specific sequence to be written or RAM that can just be written by the core? Can you please provide a J-Link log file for the failing session? wiki.segger.com/Enable_J-Link_log_file Did you try the „loadfile“ command in J-Link Commander and does that command load + verify the file successfully? wiki.segger.com/J-Link_Commander

The answer is simple: It is not supported. What do you need it for in GDB? Writing custom DMI sequences should be only necessary for custom chip bringup, where InitTarget() in a script is the right place for. For what do you need it after all the target connect etc. has already happened and GDB connected to the core? If I have a specific use-case, I may be able to justify allocating the dev time for adding support in GDB Server, at the next team meeting. BR Alex

Hi, Bad news: Currently, J-Link EDU mini does not support ARMv8-A/R based cores, like Cortex-A53 / A72 / ... Good news: Management decided that the EDU Mini is getting ARMv8-A/R architecture support, so Cortex-A53 / A72 / ... will be supported by the EDU mini with the next version (V7.92n), planned for tomorrow (31st Oct.) The wiki has already been updated to reflect the change coming with tomorrow's version. Sorry for any confusion caused. BR Alex

Hi, Good news: Management decided that the EDU Mini is getting ARMv8-A/R architecture support, so Cortex-A53 / A72 / ... will be supported by the EDU mini with the next version (V7.92n), planned for tomorrow (31st Oct.) BR Alex

Hi, If you can provide a reproducer for an eval board, we can have a look. BR Alex

Hi, RTCK is a relict from ARM7/9 days and only "needed" (more strongly recommended) for the S-cores (e.g. ARM7TDMI-S). Currently, the EDU mini does not support ARMv8-A/R based cores & devices. This includes the Cortex-A53 / A72 which is used in the Broadcom chips, that are used on the Raspis. The information on the net (wiki, website, ...) is currently inconsistent but in the process to be updated. Long story short: You cannot debug the Cortex-A based Raspis with an EDU mini right now. BR Alex

You mean like this? segger.com/supported-devices/jlink/

Can you please send me the S/N of your J-Link via PM?

Hi, Quote from GavinLi5567: “Based on the above information, I've created a jlinkscript and now can connect R52 core, but I'm not sure if there's anything missing or that needs to be perfected. ” The script looks good. Well done! BR Alex

If you are in the active support period for your J-Link and can provide an example project for an eval board (not custom hardware!!!) we can have a look. I will close this thread for now.

It’s not a J-Link problem but a uVision setup issue… You may better ask in the Keil forum, if uVision is getting you a hard time with its settings. If of interest, we could do the setup for you as well, as part of paid support, but I doubt that this would make sense in your EDU-context.

Hi, The picture does not show the actual structure… The structure would be which AP is connected to what and which components are at what addresses. You can specify 3 things: 1) The AP map 2) Which AP to use 3) Where to find the core debug registers If the R52 in your design is not discoverable through the DebugAP ROM table, you need to do (3) as well. Usually, the ROM table of the DebugAP has 1 entry that points to the ROM table of the R52 and this ROM table has an entry that specifies the addr…

Does not really make sense. Interrupt enable is not related with the low-level SWD debug protocol. I suspect a different issue. Nothing SWD-specific. I am wondering why you suspect SWD (a well proven interface) to be the issue, when not even having another interface to compare on the same chip… Pretty sure that SWD works fine. Does it work if you do not try to step the “enable interrupt” but just let the application run in the debugger? Maybe it is a step-over issue in the IDE, with the enable i…

Nope. Only standard SPI (MISO and MOSI being different pins) is supported by the direct programming approach. wiki.segger.com/Programming_External_SPI_Flashes Using the DSK to create an algorithm that supports the controller-specific “3-wire SPI” could be possible though.

the output of the working Commander session would be helpful…

Hi, Yes, the “power on perm” survives firmware updates. Your J-Link V9 is not really “newer” but only got a firmware update on May 7 2021. That does not make the model newer or more feature-rich. Some FW updates are bugfixes only. The J-Link V9 hardware version does not support the fixed VTREF command.

Hi, The manual of the STM32F4 eval board should specify to which UART pins of the STM32F4 the on-board ST-LINK is connected.