Is there a way to connect to STM32 with disabled JTAG with J-Link hardware v5 ?

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • Is there a way to connect to STM32 with disabled JTAG with J-Link hardware v5 ?

    Hello!

    I`ve got a J-Link v5 and Segger 408l software installed, and STM32F103RET6 with disabled JTAG interface (by firmware via remap register).
    How could I connect debugger for firmware update in this situation?

    In the Keil uVision 4 J-Link interface configuration I`ve found interesting option - "connect under reset".
    Does that means that debugger should connect to the core just after (or right under) NTRST signal assertion (when JTAG interface being reset and operational)?
    Unfortunately, I have no result at the moment. Debugger does not activate NTRST and can`t connect with MCU regardless of reset mode set.

    Help me, please.

  • Hi sonycman,

    the idea of "connect under reset" is to connect to the target device while nRESET is low (not nTRST).
    While nRESET is low, the CPU is reset and does not execute any instructions (e.g. "JTAG interface disable code").
    So this is the correct reset strategy in your case.

    Please note that to use the "connect under reset" of course nRESET has to be connected to the JTAG header on your hardware,
    otherwise J-Link is not able to pull nRESET low, to keep the CPU in reset.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Thanks for the answer, Alex.

    My J-Link has 20 pin JTAG header like this:

    You are talking about pin 15 of the header - RESET signal?

    But In my board this signal connected directly to the NRST pin of the STM32 MCU! (and also this pin have ceramic capacitor of 0.1 uF to the ground, as usual).

    So, in theory, when the RESET signal becomes active (LOW) - MCU must resets immediately.
    But this is not true in my case - MCU not resets, it executes firmware undisturbed while Keil unluckily tries to connect.

    Why the controller did not reset with "connect under reset" option?
    Because this pin not being active nor with "connect under reset" option, neither with any other?
    Keil software bug? Debugger firmware bug?
    Or may the capacitance of 0.1 uF is too large?

    I`ve also tried JFlashARM.exe with various reset strategies - still no luck to connect with MCU.
    At least, JFlashARM can activate RESET signal - my MCU resets and reboots several times during connect procedure.
    But in the end:
    J-Link firmware: V1.20 (J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5)
    - JTAG speed: 200 kHz (Fixed)
    - Initializing CPU core (Init sequence) ...
    - ERROR: Failed to connect
    What am I doing wrong?

  • Hi sonycman,

    sounds a bit confusing...

    >>So, in theory, when the RESET signal becomes active (LOW) - MCU must resets immediately.
    >>But this is not true in my case - MCU not resets, it executes firmware undisturbed while Keil unluckily tries to connect.
    Did you check this via JLink.exe by selecting the "connect under reset" strategy via the "rst <StrategyNo>" command and then issuing the "r" command?
    Does the Reset pin of the MCU go "LOW" when performing "r"?
    If yes, the MCU is reset. If JLink.exe is able to pull nRESET "LOW", Keil uVision is also able since the same API function is used.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Alex,

    SEGGER - Alex wrote:

    Hi sonycman,

    sounds a bit confusing...

    ...Did you check this via JLink.exe by selecting the "connect under reset" strategy via the "rst <StrategyNo>" command and then issuing the "r" command?
    Does the Reset pin of the MCU go "LOW" when performing "r"?
    I`ve tried JLink.exe just as you`re say, here is the log:
    JTAG speed: 5 kHz
    J-Link>rst 0
    Reset type NORMAL: Using RESET pin, halting CPU after Reset
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Using RESET pin, halting CPU after Reset
    Info: TotalIRLen = ?, IRPrint = 0x..00000000000000000000000000000000
    Info: TotalIRLen = ?, IRPrint = 0x..00000000000000000000000000000000

    WARNING: No matching core found. Selecting default core (ARM7).
    Info: TotalIRLen = ?, IRPrint = 0x..00000000000000000000000000000000
    Info: TotalIRLen = ?, IRPrint = 0x..00000000000000000000000000000000
    Info: Resetting target using RESET pin
    Info: Halting CPU core

    WARNING: Received 0 as core Id.
    Info: Using DBGRQ to halt CPU
    Info: Resetting TRST in order to halt CPU
    Info: Resetting target using RESET pin
    Info: Halting CPU core

    WARNING: Received 0 as core Id.
    Info: Using DBGRQ to halt CPU
    Info: Resetting TRST in order to halt CPU

    ****** Error: Could not find supported CPU core on JTAG chain
    Unable to halt ARM core
    J-Link>
    JLink perfectly resets STM32 several times, yes (I`ve tried a few other strategies too, they are all works fine).
    But Keil does not - I don`t know where the problem can be.

    Another trouble - as you`re can see from the logs - JLink cannot connect to the STM32 even after successful reset...
    This is strange.
    Because before reset STM32 has disabled JTAG and there is no way to connect with it, but AFTER reset JTAG switches on.
    Why JLink still cannon connect?