Posts by jaycarlson

    It'd be great to get J-Link flash programming support for WCH's parts — for example, the CH32V307: https://github.com/openwch/ch32v307/tree/main/Datasheet

    These parts are basically STM32 clones (but with RISC-V cores), so they come with a ton of peripherals (lots of industrial-control-oriented timers and such). The stand-out feature is the USB 2.0 HS and 10M ETH PHYs built-in.

    A cursory glance at the CH32V307 datasheet indicates their flash memory controller has a nearly-identical interface to the STM32F1 (seems to match the data from ST's app note PM0075). I wouldn't be surprised if all their MCUs used an identical programming model.

    WCH sells dev boards and samples through LCSC:
    Dev boards: https://lcsc.com/products/Devel…tml?keyword=WCH
    Samples: https://lcsc.com/products/Micro…tml?keyword=WCH

    I can successfully connect to both A7 cores of my STM32MP157 board with either of these commands:

    Code
    JLinkGDBServer -device STM32MP15xx_A7_0_DualFlash
    JLinkGDBServer -device STM32MP15xx_A7_1_DualFlash

    However, I cannot connect to the M4 core of the processor. If I attempt to default to the JTAG interface, it just says "ERROR: Could not connect to target" — if I connect via SWD, it shows more promise:

    I also tried upgrading to the latest version of J-Link software (6.86d), but that also didn't fix things (and ended up presenting a different error):

    Code
    Connecting to target...
    Halting target device failed. Trying again with reset
    ERROR: Failed to halt CPU.
    Failed to halt target device on connect
    ERROR: Could not connect to target.
    Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
    Shutting down...
    Could not connect to target.

    Any ideas what's going on? I was wondering if there was some sort of clock gating / power gating thing I had to enable on the Linux side of things to get the processor to work, but I didn't see anything from ST about this.

    What's the right way to attach a J-Link to a running i.MX6UL to debug the Linux kernel?

    I followed this post, which tells you to disable the 'clock off' wait state and use the -noir and -noreset options with the J-Link. Unfortunately, when I try starting my debug session with:

    ./JLinkGDBServer -if JTAG -endian little -device MCIMX6G3 -select USB -noir -noreset

    the J-Link resets the MPU immediately. I thought maybe I could attach to it during U-Boot, and then start debugging once I was in Linux, but the connection gets closed between the U-Boot and Linux start-up phase.

    I'm using JLink software V6.32c. My board doesn't use the sai2 interface, so there shouldn't be the widely-reported JTAG pin-muxing issue that others have struggled with.