Posts by Owain

I now have the situation where System view 2.40a seems to conenct to target and load events.

But it seems to be connecting to some kind of simulated target. "embOS start project (embOS) on ST32F207ZG"
This is not my target, shows SysTick Scheduler, HP Task, LP Task and Idle.

I have linked to library...

D:\SVN\DSE_MDx\Software\CoCPU\embOS_CortexM_IAR_V6_OBJ_V4261_OS-00732_58B82A34_161118\Start\Lib\os7m_tl__dp.a.

Am I running with some kind of demo version?
Is the System View lying when it says it is connecting via JTAG?

Regards,
Owain

Hi Martin,

I am still seeing the issue.
I can run one of your test projects that use system view OK.

In our own project though this is not the case.

I can also see us running through code that initialises this block.
As per the attachment picture.

Yet all attempt to connect to the target fail.

Regards,
Owain

Just trying to get system view working on a STM32F205.

Have updated the embos from an ancient 2009 release to latest embOS_CortexM_IAR_V6_OBJ_V4261_OS-00732_58B82A34_161118.

OS looks to be running seeing system ticks, trying to start logging, enter in address of RTT control block.
The I see pop-up....

Failed to start recording.
J-Link or target not connected.
Target not running.
System View module not configured.

Am using system view V2.40a, my IAR version installed is 7.40.2

Be grateful for any hints.

Regards,
Owain

Hi Again All,

Just a question as to how to debug an SP using JLinkGDBServer or JLinkExe.

Currently when I connect to my target using JLinkExe and I reset the target; I see a printf from the exisitng SPL which resides in embedded SDCard.
So this "r" command has actually run the mask ROM loader, loaded SPL from SD and broke/stopped at some address; 0x00910D8. This being am address in the OCRAM Free Area somewhere within the old SPL.

But I need to debug a new SPL and I really want to break at the point the mask programmed loader has copied the SPL from SDCard and is about to jump into the SPL.
At this point I use the JTAG to replace the SPL in RAM; I am then free to debug the SPL.

So at this point I load the new SPL via the JTAG and hit go; after which I do not see my new u-bootprintf or can I stop the debugger.
But at the time I load the SPL I have not got the system in the correct state as it would have been after the load of the SPL by the mask rommed loader.

So my questions...

1) How can I make the "monitor reset" actually stop at the point it is about to jump to the SPL code?
2) Or how can I put the system into that state.

Both these questions require intimate knowledge of the imx6 rommed bootloader.
But whoever designed the segger "monitor reset" for the imx6 decided somehow where to stop the processor?

Can anyone inspire me?

Thanks,
Owain

Hi,

Since yestereday I have procured a new card with iMX processor and made up a new deug connector to connect from JLink to the Non-Standard Technexion JTag port on the EDM. I have not yet replaced SPL or U-boot.

So I suspect issue was faulty HW.

Regards,
Owain

Hi,

I was working successfully with both JLinkExe and JLinkGDBServer when my target had a running SPL and U-Boot.
I just now replaced the SPL and the u-boot. u-boot is buggy, but console shows prints for SPL and U-Boot startup.

But now when I try and connect using either JLinkExe or JLinkGDBServer it fails as in dump here. Can anyone give me some hints of how to fix and get a connection again?

Kind Regards,
Owain

/git$ JLinkGDBServer -device MCIMX6S5
SEGGER J-Link GDB Server V6.10f Command Line Version

JLinkARM.dll V6.10f (DLL compiled Oct 17 2016 17:44:27)

-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: yes
Generate logfile: off
Verify download: off
Init regs on start: off
Silent mode: off
Single run mode: off
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: none
J-Link settings file: none
------Target related settings------
Target device: MCIMX6S5
Target interface: JTAG
Target interface speed: 1000kHz
Target endian: little

Connecting to J-Link...
J-Link is connected.
Firmware: J-Link V9 compiled Sep 1 2016 18:29:50
Hardware: V9.30
S/N: 609300690
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
Checking target voltage...
Target voltage: 3.29 V
Listening on TCP/IP port 2331
Connecting to target...WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

ERROR: Cortex-A/R (connect): Failed to temporarily halting CPU for reading CP15 registers.
ERROR: Could not connect to target.
Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
Shutting down...
Could not connect to target.
Please check power, connection and settings.owain@owain-XPS-L421X:~/SVN/DSE_MDx//git$ Software/Source/u-boot-edm-imx/2013-r0/

On starting JLinkGDBServer it must be going through some JTAG stuff that results in a reset, because every time I try and start the server at the console I see...

U-Boot SPL 2013.10 (Nov 07 2016 - 11:56:46)
Boot Device: MMC
reading boot/u-boot.img
reading boot/u-boot.img


U-Boot 2013.10 (Nov 07 2016 - 11:56:46)

CPU: Freescale i.MX6SOLO rev1.2 at 792 MHz
Reset cause: POR
Board: edm_cf_imx6
DRAM: 512 MiB
NAND: 0 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Environment is in MMC....
auto-detected panel wvga-lvds
MPK: enable_lvds done
Display: wvga-lvds (800x480)
ipu_clk = 260000000
ldb_clk = 65000000