Hello,
Sorry for the late response.
Just to make sure that we understand you correct here, you do not see any issues / errors during flash programming, correct? --> Watchdog seems to be fed correctly.
I'm not sure it is not occurring during flash programming (I'll do more tests). Normally, if DBGMCU register is well configured, watchdog is stopped when CPU is halted.
I'll come back to you as soon as i have more information.
Hello,
Thank you very much for the answer. Here is the script we are launching at the very beginning to stop hardware watchdog: stm32_release_swd.txt (This is the only place where i modify option byte)
When our board is flashed, if there is no refresh, watchdog is supposed to be triggered around 30 seconds. And sometime, this script bricked the board, after the issue occurs, when i try to reconnect my J-Link, i have this popup:
When i read memory at 0x40023C14, i obtain: 0xCFFFFFFD (i should have 0x0FFFAAED). I understand why some bit are raised (hardware watchdog is stopped, BOR level is ok ...) but others have a weird state, especially SPRMOD (bit31), DB1M (bit30) or BFB2 (bit4) ... Moreover, RDP (bit15 : 8 indicating read protect level is at level 1 !!!
I'm suspecting that i don't let enough time to the MCU when i'm updating FLASH_OPTCR register because i'm immediatly doing a reset after the modification (maybe its the MCU itself that locks its memory to prevent any other modification but i don't let it recovering its original state)
Best regards,
Aurélien
Hello,
I’m currently facing an issue during flashing an STM32F429ZI (Cortex-M4) with a J-Link (but not every time). I’m activating IWDG watchdog as an hardware watchdog (in option byte, it means that wdg is automatically activated by hardware at power on), and it seems that this option can disturb flashing or erasing.
Indeed, during flashing or erasing, following scripts are launched:
h
erase
r
q
power on
r
loadbin file.bin 0xYYYYYYYY
r
qc
But, hardware watchdog is still activated and I’m suspecting that wdg is triggered during flashing or erasing sequences. And, at one moment, by board is bricked … Impossible to launch erase or loadbin procedure again … it will return an error. I have finally found why it returns an error. Actually, on STM32F429, there is a SPRMOD bit (in FLASH_OPTCR register) that enables or not read/write protection, and this bit has been raised and I don’t know why. I have finally found a particular procedure to fall again this bit, and I’m able to recover my board. But, I would like to know if someone has an idea about why this bit could have been raised. Am i doing something wrong ?
Thank you in advance.
BR,
Aurélien
