wittich Beginner

  • Member since Aug 16th 2019
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  • wittich -

    Replied to the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Post
    It is awkward to reply to my own thread so many times, but I discovered that I _can_ attach to a running process and seems to mostly work. So the big hold-up really appears to be limited to the reset. I have found I can load the binary with JLINK but…
  • wittich -

    Replied to the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Post
    Hi Nino I am attaching a jlink log file. I stared at it for a bit but was unable to be wiser based on its output, but again it fails around here on the reset. 02-00000000-00-00002141-0042: T89539700 002:148 JLINK_ResetPullsRESET(ON) (0000ms, 1298ms…
  • wittich -

    Replied to the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Post
    Hi Nino Yes looking at the log file I posted on the original post (well, std out of the gdb session) it looks like it fails on reset. The reset pin is not connected to the devices, so something else is going on. I will have to try to capture the J-Link…
  • wittich -

    Replied to the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Post
    Hi Nino Thanks for your response. I can start the command-line invocation of the gdb server command but then I don't know what to do next. It starts ok but then does not do anything if i just call it with the arguments listed above. Do you have a…
  • wittich -

    Replied to the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Post
    Hi, so if no one has any suggestions, can anyone give me more generic advice or experience with the combination of a JTAG chain of ARM (non-Zynq) + FPGA using SEGGER tools? Any hints or comments would be appreciated. Even an appropriate eval board I…
  • wittich -

    Posted the thread program Cortex-M4 processor with 2 Xilinx FPGAs in JTAG chain.

    Thread
    Dear all I have a custom board that has on it a Tiva TM4C1290NCPDT MCU and two Xilinx FPGAs (Ultrascale+ devices.) These boards share a JTAG chain. Via jumpers I can select out one of the devices and program it on the test bench, but once the board is in…