hbl Beginner

  • Member since Apr 3rd 2019
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  • hbl -

    Replied to the thread [SOLVED] Multi core debugging.

    Hi Thanks for your explanation. The device information I founed is :SEGGER J-Link ARM V9.4, SN=59401308. I found information about muli-core ddbugging in chapter Multi-core debugging and J-Link script files in the J-Link user manual UM08001. But I…
  • hbl -

    Posted the thread [SOLVED] Multi core debugging.

    Hi Now,I'm currently validating IP about cortex-A7 with FPGA. I can connect to core0 of the cpu by JLINK, but not connect to core1. The JLINK version is V9. Like this,core1 defaults to halt as long as it be connected to JLINK. How to debug cores…