SEGGER - Alex Administrator

Hi, The manual of the STM32F4 eval board should specify to which UART pins of the STM32F4 the on-board ST-LINK is connected.

I have the feeling that you do not understand what I am saying…. 0x0 in your FPGA is not ROM but RAM. Otherwise, J-Link could not write it. No matter if it will be ROM in the final design / silicon, it is RAM now. In uVision you have told it to be…

The device should not and is not in boundary scan mode by default. You either set it via fuses or boot pins. Last but not least it was only a wild guess from my side. You should know what mode you configured your device into. Also, did you make sure…

IRLen = 5 is not a valid IRLen for a DAP-TAP (the JTAG TAP used to access the ARM Cortex core). It should be IRLen = 4. I see 2 possible reasons for this: 1) Signal quality issue so that some bit(s) are not sampled correctly and this leads to a wrong ID…

Hi, What exactly is the question? You have an M0 and want to download some code to it? The M0 has RAM @ 0x0? If there is really ROM @ 0x0, I do not see how you can write that at all…

Thanks for providing the scripts. We have adapted J-Link Commander accordingly, even though having only carriage return (\r) as a newline / line ending is somewhat strange... However, this adaption will be part of a new version, planned for 20th…

You most probably have a unit that is out of support & maintenance and will therefore not get firmware updates.

No. J-Link Commander is not designed for production. There are currently no plans to add a command / extension like parameterized command / script. You may however create the script on demand, by the caller, depending on the file to program.

Can you please attach your scripts as originals, so all line endings etc are preserved. Indeed the output does look strange here and there.

There is no help given for such things. A later HW version may not run with an older firmware or may require a completely different BTL + firmware. So, it is usually not possible to swap 1-2 components and expect the unit to suddenly be, report to be and…

Just curious: What do you need the write for? I would expect the application to setup the CP15 registers on its own, if it needs them to run correctly. Otherwise, your application would not work without a debugger being attached that does these writes…

So what exactly is the question? If the SPI flash is not responding, there is either a wiring issue or other setup issue… But your screenshot does not really show a complete sequence. There should be 8-bit = 0x9F on MOSI, followed by 8-bit…

So far, I agree to your analysis, that the pattern in memory looks somewhat too similar to the observed transfers than being a coincidence… May I ask how you use J-Link? 1) gdb -> OpenOCD -> J-Link 2) gdb -> J-Link GDB Server -> J-Link Accessing the…

See the init steps. Build a „clear protection bits“ sequence by adding a „write status register“ sequence.

Can you post a screenshot of the old version that shows that multiple connects in a row work? I would be surprised if a popular chip like the STM32H5 series would be that broken in a generic way but nobody else ran into and reported it. Are you 100%…

Did you check out this? segger.com/products/debug-prob…-for-development-purposes

There is a firmware update available for the EDU Mini that adds WinUSB support, so it can be enabled in J-Link Configurator. This allows you to use the EDU Mini in your setup. Note that you will be unable to perform FW updates under Windows arm64. You…

Ping. Is this thread still active?

What settings are you working with (JTAG speed)? What speed is the CPU running when reading the memory? How much memory are you trying to read? (1KB, 16KB, 128KB, …) How long does the reading take in J-Link Commander? (Next to not noticable, 1s, 2s, …)

The size limit cannot be increased by you and > 64 KB sounds insane for a flash algorithm… You may post your ELF file here or send it via PM, if you want us to have a look. BR Alex