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Hello!
Using latest Ozone (v3.38a) debugging .elf application for IMX6ULL (Cortex-A7), the second part of double precision registers (D16 to D31) are displayed incorrectly:
It seems only lower 32 bits of the double register is intact, but high 32 bits are zeroed out for some reason.
This is user interface only issue, registers contents are actually right and CPU execution goes as intended.
In the J-Link web control panel these registers are fine with full 64 bit data:
In IAR EW debugger all is fine also - double precision registers D0-D31 are displayed and edited OK.
Regards, Vlad.
Using latest Ozone (v3.38a) debugging .elf application for IMX6ULL (Cortex-A7), the second part of double precision registers (D16 to D31) are displayed incorrectly:
It seems only lower 32 bits of the double register is intact, but high 32 bits are zeroed out for some reason.
This is user interface only issue, registers contents are actually right and CPU execution goes as intended.
In the J-Link web control panel these registers are fine with full 64 bit data:
In IAR EW debugger all is fine also - double precision registers D0-D31 are displayed and edited OK.
Regards, Vlad.