Could not stop cortex-M device

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  • Could not stop cortex-M device

    I get the 'could not stop cortex-M device' message when trying to download or debug my application with Keil/J-Link/JTAG. I don't even know where to look for solving this problem. There is a possibility that the PCB design is at fault. However I wasn't able to find any information on how to correctly wire the JTAG port of my LPC1754. Do I need pull-ups/downs, what values, etc.
    So my questions is:
    1. Is there app notes or specification or reference design on how to actually wire and connect the JTAG port to be used by J-link
    2. Did anybody else ever had this 'can't stop cpu' issue and found a way to resolve it.
    I seem to be lacking serious documentation. I don't even know what the difference is between all those reset modes offered by J-link (HW reset, vector reset, sysreqreset). Where is all that documented?
    I'd appreciate any help.
  • Soooo. It turns out the problem was LPC17xx pin P2.10, which cannot be low during reset, or the boot-loader is started instead of user code. Easy to miss in the NXP documentation.
    HOWEVER. Now everything works fine when using a cheap $19 JTAG probe from Cooxox.
    However it still doesn't work when using the $300 j-link box (can't stop CPU message still there). But I'm sure it's only one of those many 100 options and switches somewhere burried in the j-link software.
  • Hi,

    We are not aware of any problems with the LPC1754. We have a lot of customers
    out there who are using LPC17xxx devices without any problems.

    As a basic test: Did you install our software and documentation package for J-Link?
    segger.com/download_jlink.html

    If yes, could you please start J-Link Commander (a small command line utility which can be used to verify basic functionality of J-Link & target interaction)
    and check if basic commands like "g" (go), "h" (halt) and "r" (reset) work without any problems?


    Best regards
    Ales
  • Ok, I did some more playing around with it. J-link works fine when using JTAG frequencies > 1MHz. It doesn't like frequencies < 1MHz. With slower frequencies it can't communicate reliably, sometimes not even recognizing the CPU. (Same behaviour in J-Link commander, too).
    Well, at least I got something to work with now. I have to suspect that somethings' not right with my PCB. Especially I don't have any pull-up/dn installed on any of the JTAG lines. Maybe that's the problem. Unfortunately I couldn't find anything regarding JTAG in the NXP documentation. Not sure if the pull-up/dn on JTAG ports are a requirement or only a recommendation. If I find out I'll post it. :P