[ABANDONED] Flash does not work with ozone while works with JLinkExe

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  • [ABANDONED] Flash does not work with ozone while works with JLinkExe

    Hello,

    On Linux 22.04.2 LTS. I'm trying to flash a board with ozone 3.30 with J-Trace Pro ARM Cortex-M.

    I must say that this worked in the past with this board (in the past, I was using an older version of ozone. I don't remember
    which but not very old. BTW I switched to 3.3 AFTER the bug occurs so it's not 3.30 specific.).

    Today flash fails in ozone 3.30 with this log:

    Brainfuck Source Code

    1. Debug.Start();
    2. Device "STM32L471RG" selected.
    3. InitTarget() start
    4. SWD selected. Executing JTAG -> SWD switching sequence.
    5. DAP initialized successfully.
    6. InitTarget() end - Took 4.68ms
    7. Found SW-DP with ID 0x2BA01477
    8. DPIDR: 0x2BA01477
    9. CoreSight SoC-400 or earlier
    10. Scanning AP map to find all available APs
    11. AP[1]: Stopped AP scan as end of AP map has been reached
    12. AP[0]: AHB-AP (IDR: 0x24770011)
    13. Iterating through AP map to find AHB-AP to use
    14. AP[0]: Core found
    15. AP[0]: AHB-AP ROM base: 0xE00FF000
    16. CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    17. Found Cortex-M4 r0p1, Little endian.
    18. FPUnit: 6 code (BP) slots and 2 literal slots
    19. CoreSight components:
    20. ROMTbl[0] @ E00FF000
    21. [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    22. [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    23. [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    24. [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    25. [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    26. [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    27. Connected to target device.
    28. Reset: Halt core after reset via DEMCR.VC_CORERESET.
    29. Reset: Reset device via AIRCR.SYSRESETREQ.
    30. ------------------------------------------- _SetupTarget
    31. Elf.GetBaseAddr(); // returns 0x8041000
    32. Target.ReadU32 (0x08041000); // returns 0x4, data is 0x20018000
    33. Target.SetReg ("SP", 0x20018000);
    34. Elf.GetEntryPointPC(); // returns 0x804C404
    35. Target.SetReg ("PC", 0x804C404);
    36. J-Link: Flash download: Bank 0 @ 0x08000000: 1 range affected (96256 bytes)
    37. J-Link: Flash download: Total: 1.588s (Prepare: 0.071s, Compare: 0.066s, Erase: 1.037s, Program: 0.321s, Verify: 0.032s, Restore: 0.059s)
    38. J-Link: Flash download: Program speed: 292 KB/s
    39. Verification failed @ address 0x08041000
    40. Download failed: error during verification phase
    42. ------------------------------------------- _SetupTarget
    43. Elf.GetBaseAddr(); // returns 0x8041000
    44. Target.ReadU32 (0x08041000); // returns 0x4, data is 0x20018000
    45. Target.SetReg ("SP", 0x20018000);
    46. Elf.GetEntryPointPC(); // returns 0x804C404
    47. Target.SetReg ("PC", 0x804C404);
    Display All



    If I switch to command line, It works as expected:

    Source Code

    1. SEGGER J-Link Commander V7.84b (Compiled Jan 11 2023 16:43:08)
    2. DLL version V7.84b, compiled Jan 11 2023 16:42:38
    4. Connecting to J-Link via USB...O.K.
    5. Firmware: J-Trace PRO V2 Cortex-M compiled Jun 6 2023 10:51:16
    6. Hardware version: V2.00
    7. J-Link uptime (since boot): 0d 00h 06m 27s
    8. S/N: 752000945
    9. License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    10. USB speed mode: High speed (480 MBit/s)
    11. IP-Addr: DHCP (no addr. received yet)
    12. Emulator has RAWTRACE capability
    13. VTref=3.329V
    16. Type "connect" to establish a target connection, '?' for help
    17. J-Link>connect
    18. Please specify device / core. <Default>: STM32L471RG
    19. Type '?' for selection dialog
    20. Device>
    21. Please specify target interface:
    22. J) JTAG (Default)
    23. S) SWD
    24. T) cJTAG
    25. TIF>S
    26. Specify target interface speed [kHz]. <Default>: 4000 kHz
    27. Speed>
    28. Device "STM32L471RG" selected.
    31. Connecting to target via SWD
    32. InitTarget() start
    33. InitTarget() end
    34. Found SW-DP with ID 0x2BA01477
    35. DPIDR: 0x2BA01477
    36. CoreSight SoC-400 or earlier
    37. Scanning AP map to find all available APs
    38. AP[1]: Stopped AP scan as end of AP map has been reached
    39. AP[0]: AHB-AP (IDR: 0x24770011)
    40. Iterating through AP map to find AHB-AP to use
    41. AP[0]: Core found
    42. AP[0]: AHB-AP ROM base: 0xE00FF000
    43. CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    44. Found Cortex-M4 r0p1, Little endian.
    45. FPUnit: 6 code (BP) slots and 2 literal slots
    46. CoreSight components:
    47. ROMTbl[0] @ E00FF000
    48. [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    49. [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    50. [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    51. [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    52. [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    53. [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    54. Memory zones:
    55. Zone: Default Description: Default access mode
    56. Cortex-M4 identified.
    57. J-Link>loadfile /home/ju/dev/XXXXXXXXXXXXXXXXXXXXXXXXXXXX/_build/split_v1/bin-gcc/split-dbg.elf
    58. 'loadfile': Performing implicit reset & halt of MCU.
    59. Reset: Halt core after reset via DEMCR.VC_CORERESET.
    60. Reset: Reset device via AIRCR.SYSRESETREQ.
    61. Downloading file [/home/ju/dev/XXXXXXXXXXXXXXXXXXXXXXXXXXXX/_build/split_v1/bin-gcc/split-dbg.elf]...
    62. J-Link: Flash download: Bank 0 @ 0x08000000: 4 ranges affected (24576 bytes)
    63. J-Link: Flash download: Total: 0.776s (Prepare: 0.073s, Compare: 0.080s, Erase: 0.323s, Program & Verify: 0.274s, Restore: 0.024s)
    64. J-Link: Flash download: Program & Verify speed: 87 KB/s
    65. O.K.
    66. J-Link>OnDisconnectTarget() start
    67. OnDisconnectTarget() end
    Display All

    Now, switch back to ozone. It checks that firmware is the same and runs:

    Brainfuck Source Code

    1. Debug.Start();
    2. Device "STM32L471RG" selected.
    3. InitTarget() start
    4. SWD selected. Executing JTAG -> SWD switching sequence.
    5. DAP initialized successfully.
    6. InitTarget() end - Took 4.61ms
    7. Found SW-DP with ID 0x2BA01477
    8. DPIDR: 0x2BA01477
    9. CoreSight SoC-400 or earlier
    10. Scanning AP map to find all available APs
    11. AP[1]: Stopped AP scan as end of AP map has been reached
    12. AP[0]: AHB-AP (IDR: 0x24770011)
    13. Iterating through AP map to find AHB-AP to use
    14. AP[0]: Core found
    15. AP[0]: AHB-AP ROM base: 0xE00FF000
    16. CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    17. Found Cortex-M4 r0p1, Little endian.
    18. FPUnit: 6 code (BP) slots and 2 literal slots
    19. CoreSight components:
    20. ROMTbl[0] @ E00FF000
    21. [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    22. [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    23. [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    24. [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    25. [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    26. [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    27. Connected to target device.
    28. Reset: Halt core after reset via DEMCR.VC_CORERESET.
    29. Reset: Reset device via AIRCR.SYSRESETREQ.
    30. ------------------------------------------- _SetupTarget
    31. Elf.GetBaseAddr(); // returns 0x8041000
    32. Target.ReadU32 (0x08041000); // returns 0x4, data is 0x20018000
    33. Target.SetReg ("SP", 0x20018000);
    34. Elf.GetEntryPointPC(); // returns 0x804C404
    35. Target.SetReg ("PC", 0x804C404);
    36. J-Link: Flash download: Bank 0 @ 0x08000000: Skipped. Contents already match
    37. ------------------------------------------- _SetupTarget
    38. Elf.GetBaseAddr(); // returns 0x8041000
    39. Target.ReadU32 (0x08041000); // returns 0x4, data is 0x20018000
    40. Target.SetReg ("SP", 0x20018000);
    41. Elf.GetEntryPointPC(); // returns 0x804C404
    42. Target.SetReg ("PC", 0x804C404);
    Display All

    What could it be?

    Thanks
    Julien

  • Hello Julien,

    Thank you for your inquiry.
    Could you try the latest version of Ozone V3.30a?
    Do you see the same behaviour there?

    If yes, could you provide a J-Link log of the failing session?
    wiki.segger.com/Enable_J-Link_log_file

    Is the issue reproducible on an eval board?

    Best regards,
    Nino
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