[ABANDONED] Risc-V core hart selection?

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • [ABANDONED] Risc-V core hart selection?

    I'm trying to use my jlink to debug Starfive JH7110, which has a 1+4 harts version of U74-MC. I could successfully connect to chip, but I don't know which hart is selected and how to choose specific hart. Anyone could help?

  • I'm trying to set dmcontrol register to select hart, but commander always report using hart0. Is this a bug?
    Script:

    C Source Code

    1. int InitTarget(void)
    2. {
    3. //
    4. // TDI -> TAP_#1 -> TAP_#0 -> TDO
    5. //
    6. // TAP_#0 info:
    7. // Maybe E24?
    8. // IRLen: 5
    9. //
    10. // TAP_#1 info:
    11. // U74-MC here
    12. // IRLen: 5
    13. //
    14. //
    15. // Code to connect to TAP_#1
    16. //
    17. JLINK_JTAG_DRPre = 1;
    18. JLINK_JTAG_DRPost = 0;
    19. JLINK_JTAG_IRPre = 5;
    20. JLINK_JTAG_IRPost = 0;
    21. JLINK_JTAG_IRLen = 5;
    22. JLINK_SetDevice("U74-MC");
    23. return 0;
    24. }
    27. // Select needed hart
    28. // Seems Jlink could not handle multi-core debugging at the same time through script file?
    29. // Or there exists some APIs not written in official wiki that could handle this?
    30. int SetupTarget(void)
    31. {
    32. int ret;
    34. U32 dmcontrol_addr;
    36. U32 hasel_mask;
    37. U32 hartsello_mask;
    38. U32 hartselhi_mask;
    40. U32 dmcontrol_value;
    41. U32 hart_id;
    42. U32 hart_id_target;
    44. // Set wanted hart id here(0 is S7 core, 1~4 is U74 core)
    45. hart_id = 3;
    47. ret = 0;
    48. dmcontrol_addr = 0x10;
    49. hasel_mask = 0x04000000;
    50. hartsello_mask = 0x03FF0000;
    51. hartselhi_mask = 0x0000FFC0;
    53. // Core selection through writing DMI registers
    55. // First, do automatic configure
    56. // Needed or connection would fail
    57. ret = JLINK_RISCV_DMI_AutodetectDMISettings();
    58. if(ret < 0)
    59. {
    60. return ret;
    61. }
    63. // Second, read dmcontrol to get current hart;
    64. ret = JLINK_RISCV_DMI_ReadReg(dmcontrol_addr, &dmcontrol_value);
    65. if(ret < 0)
    66. {
    67. return ret;
    68. }
    69. hart_id_target = ((dmcontrol_value & hartsello_mask) >> 16) | ((dmcontrol_value & hartselhi_mask) << 4);
    70. JLINK_SYS_Report("********************************");
    71. JLINK_SYS_Report("Pre-selection info");
    72. JLINK_SYS_Report1("dmcontrol value is: ", dmcontrol_value);
    73. JLINK_SYS_Report1("Current hart id is: ", hart_id_target);
    74. JLINK_SYS_Report("********************************");
    76. // Third, modify dmcontrol value to select wanted hart.
    77. dmcontrol_value = dmcontrol_value | ((hart_id & (hartsello_mask >> 16)) << 16) | ((hart_id & (hartselhi_mask << 4)) >> 4);
    78. ret = JLINK_RISCV_DMI_WriteReg(dmcontrol_addr, dmcontrol_value);
    79. if(ret < 0)
    80. {
    81. return ret;
    82. }
    84. // Fourth, check if configure is successful
    85. ret = JLINK_RISCV_DMI_ReadReg(dmcontrol_addr, &dmcontrol_value);
    86. hart_id_target = ((dmcontrol_value & hartsello_mask) >> 16) | ((dmcontrol_value & hartselhi_mask) << 4);
    87. JLINK_SYS_Report("********************************");
    88. JLINK_SYS_Report("Post-selection info");
    89. JLINK_SYS_Report1("dmcontrol value is: ", dmcontrol_value);
    90. JLINK_SYS_Report1("Current hart id is: ", hart_id_target);
    91. JLINK_SYS_Report("********************************");
    93. return ret;
    94. }
    Display All

    And here's JLink Commander output:

    Source Code

    1. SEGGER J-Link Commander V7.86h (Compiled Apr 12 2023 16:11:59)
    2. DLL version V7.86h, compiled Apr 12 2023 16:10:23
    4. Connecting to J-Link via USB...O.K.
    5. Firmware: J-Link V11 compiled Mar 28 2023 16:59:55
    6. Hardware version: V11.00
    7. J-Link uptime (since boot): 0d 00h 06m 32s
    8. S/N: 261011862
    9. License(s): FlashBP, GDB
    10. OEM: SEGGER-EDU
    11. USB speed mode: High speed (480 MBit/s)
    12. VTref=3.300V (fixed)
    15. Type "connect" to establish a target connection, '?' for help
    16. J-Link>connect
    17. Please specify device / core. <Default>: U74-MC
    18. Type '?' for selection dialog
    19. Device>
    20. Please specify target interface:
    21. J) JTAG (Default)
    22. S) SWD
    23. T) cJTAG
    24. TIF>
    25. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    26. JTAGConf>
    27. Specify target interface speed [kHz]. <Default>: 4000 kHz
    28. Speed>15000
    29. Device "U74-MC" selected.
    32. Connecting to target via JTAG
    33. ConfigTargetSettings() start
    34. ConfigTargetSettings() end - Took 6us
    35. InitTarget() start
    36. Device "U74-MC" selected.
    37. InitTarget() end - Took 1.15ms
    38. TotalIRLen = 10, IRPrint = 0x0021
    39. JTAG chain detection found 2 devices:
    40. #0 Id: 0x07110CFD, IRLen: 05, Unknown device
    41. #1 Id: 0x07110CFD, IRLen: 05, Unknown device
    42. Debug architecture:
    43. RISC-V debug: 0.13
    44. AddrBits: 7
    45. DataBits: 32
    46. IdleClks: 5
    47. Memory access:
    48. Via system bus: Yes (8/16/32/64-bit accesses are supported)
    49. Via ProgBuf: Yes (16 ProgBuf entries)
    50. Via abstract command (AAM): May be tried as last resort
    51. DataBuf: 2 entries
    52. autoexec[0] implemented: Yes
    53. Detected: RV64 core
    54. Temp. halting CPU for for feature detection...
    55. HW instruction/data BPs: 8
    56. Support set/clr BPs while running: No
    57. HW data BPs trigger before execution of inst
    58. CSR access via abs. commands: No
    59. Feature detection done. Restarting core...
    60. BG memory access support: Via SBA
    61. SetupTarget() start
    62. ********************************
    63. Pre-selection info
    64. dmcontrol value is: 0x00000001
    65. Current hart id is: 0x00000000
    66. ********************************
    67. ********************************
    68. Post-selection info
    69. dmcontrol value is: 0x00030001
    70. Current hart id is: 0x00000003
    71. ********************************
    72. SetupTarget() end - Took 3.56ms
    73. Memory zones:
    74. Zone: "Default" Description: Default access mode
    75. RISC-V identified.
    76. J-Link>halt
    77. pc = 000000004000AB9A sp = 0000000040060F00 ra = 000000004000ABA0
    78. gp = 0000000000000000 tp = 0000000040061000 fp = 0000000040060F30
    79. t0 = 0000000000000022 t1 = 0000000000000000 t2 = 0000000000000000
    80. t3 = 0000000000000000 t4 = 0000000000000000 t5 = 0000000000000000 t6 = 0000000000000000
    81. a0 = 0000000000000001 a1 = 0000000000000000 a2 = 0000000000000000 a3 = 0000000000090006
    82. a4 = 0000000002000000 a5 = 0000000000000808 a6 = 0000000000000000 a7 = 0000000000000000
    83. s1 = 0000000040061068 s2 = 0000000000000002 s3 = 0000000000000000 s4 = 0000000040042000
    84. s5 = 0000000040042020 s6 = 0000000000000000 s7 = 0000000000000018 s8 = 0000000000002000
    85. s9 = 000000004004EAB8 s10 = 0000000000000000 s11 = 0000000000000000
    86. J-Link>readcsr 0xF11
    87. CSR 0x0F11: 0x00000489
    88. J-Link>readcsr 0xF12
    89. CSR 0x0F12: 0x8000000000000007
    90. J-Link>readcsr 0xF13
    91. CSR 0x0F13: 0x04210427
    92. J-Link>readcsr 0xF14
    93. CSR 0x0F14: 0x00000000
    94. J-Link>readcsr 0x301
    95. CSR 0x0301: 0x8000000000901107
    Display All

    CSR 0x301(misa) also implies this is a S7 core(at hart 0) rather than a U74 core.