[SOLVED] regarding ROM Table Scan problem

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  • [SOLVED] regarding ROM Table Scan problem

    Hello,
    I am developing the cortex-A53 based FPGA system.

    If I enter connect command on JLink Commander Utility, then it scans the ROM Table inside coresight SoC600.
    But, it stops the ROM Table scan immediately and the JLink utility prints the connection fail message
    (refer to the 1st attached image)

    When I tested it with openocd, all ROM Table entries were scanned well without connection fail.
    The ROM Table structure is as follows.
    (refer to the 2nd attached image)

    In my opinion, if some entries are not present in the middle position of table like the picture above, it seems to stop the searching even though there are some ROM entries later.

    I am using the latest jlink utility 7.84d.
    Is there any solution to fix it up ?

    Thank you in advance.
    Images
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  • J-Link already told you why it stopped scanning… There is no fix required because it is expected behavior.

    Did you even check the link that is printed?
    wiki.segger.com/ROMTableScan

    While on *your* setup a complete scan might work, the common default in the field is the one described in the article.
    Currently, there is no way to FORCE a full scan, but we will add that to be wishlist.
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.