[SOLVED] J-Trace setup on NXP RT106x

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  • [SOLVED] J-Trace setup on NXP RT106x

    I can't setup properly J-Trace/Ozone for tracig on NXP RT1060-EVK (REV A2).

    I wired a custom connector according to "19-pin JTAG/SWD and Trace connector" indication on J-Trace User Guide.
    TRACE0 soldered on R247 (GPIO_B0_04)
    TRACE1 soldered on pin 1 of SW5 (GPIO_B0_05)
    TRACE2 soldered on pin 2 of SW5 (GPIO_B0_06)
    TRACE3 soldered on pin 3 of SW5 (GPIO_B0_07)
    ARM CKL on pin 3 of SW6 (GPIO_B0_12)
    ARM SWO on pin 2 of SW7 (GPIO_B0_13)
    Switches for those pins are either DNP or in off position (no pull up).
    R247, R248, R249, R250, R255, R256 DNP (no pull down).

    Other SWD pins are connected to the jtag connector.
    The flashing and normal debug works properly.

    Then I configured a default project with MCUXPresso IDE to:
    - GPIO: enable trace pins, trace clock and swo on GPIO_B0_04/GPIO_B0_07 - GPIO_B0_12/GPIO_B0_13
    - CLOCK: enable trace clock

    Then configured Ozone jdebug files to enable tracing (Trace Pins).

    But this setup is not working, I can see with a scope the trace clock and trace signals, J-Trace TRACE led lights up ORANGE, but Ozone does not update instruction counters.

    I tryed variuos settings on the GPIO pins (fast/slow, different drive strenght) and on the trace clock too (from 132MHz to 88MHz) but I can't find a working setting.

    The trace clock is not as good as the one here: wiki.segger.com/Tracing_on_NXP…050_Trace_Reference_Board), but the scope used to check is a 200MHz one.

    I can't check the NXP_iMX_RT1050 reference board confugurarion because seems that all the relevant setup is done inside the compiled .pex file.

    Could you provide a schematic of the NXP_iMX_RT1050 reference board and, most useful, the configuration steps in the right order (if relevant) for the GPIO pins and trace clock for the RT1050 reference board?

    Many thanks
  • Hello Alessio,

    Thank you for your inquiry.
    The RT1060-EVK unfortunately is no trace capable board (with proper trace header). So while you can certainly wire everything up with flying wires we do not recommend to run such setup in development as this is simply asking for trouble with signal integrity issues. We recommend to use such setups for just a proof of concept but do not recommend to exceed 10 MHz on the trace clock as signal quality with flying wires on higher speeds degrades drastically. So trying 132 or 88 MHz here is a bit utopian ;)

    Either way the general setup is only a side issue here.
    The main issue is most likely the general initialization of the trace clock and pins. For that we recommend to use a JLinkScript file.
    Why and how to write such file is explained here:

    We can send you the source of the 1050 pex file as reference but would need to do so via email.
    Could you open a support ticket in this regard as explained in my signature? Simply reference this thread and we will send it to you.

    For the sake of completeness, schematics of the 1050 trace reference board you can find here:

    Best regards,

    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Nino,
    thaks for the reply.

    I must be blind I didn't noticed the schematic download button on the website...

    Regarding .pex source files I opened a ticket as you suggested. [Inquiry#60305999]

    Many thanks,