Hello,

I'm debugging an STM32F407 using a JLink and Ozone. I discovered that the JLink modifies registers in the STM32 that are not necessarily needed for Debugging code over SWD e.g.: DBGMCU_APB1_FZ. The JLink modifies e.g. the setting of the control bit that controls that the watchdog is frozen whenever the CPU is not running. This is indeed desirable behavior during most debugging. However, for me this is really inconvenient as I need manually need to reset this bit to its default value either in the application code on the STM or via the debugger.

I haven't found anything in a configuration file. I assume this behavior is burried somewhere internally in the STM32F4 device implementation.
Ideally I would like to control this behavior but if it's not possible a list of things the JLink touches would be great.

Our software checks several configuration registers using CRC checksums. Patching this stuff out too much work for every debugging session. I'm fully aware that any breakpoint will cause the watchdog to trigger but I just want these configuration registers to remain at reset state. Is there any list of what is touched? Otherwise I probably have to use a different debugger.