[SOLVED]J-LINK connection problem

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  • [SOLVED]J-LINK connection problem

    I have two JLink ARM adaptors and two of our custom LPC2148 based boards.

    Last week at least one of each was working just fine. Coming back to it this week none of the combinations are working.
    I tried upgrading to the latest segger driver and software, but still no joy.

    Here is the output from jlink.exe when trying to connect:
    (I did let it update the firmware in adaptor 1, but not in adaptor 2)


    >> Adaptor 1, board 1

    J-Link>usb 0
    Connecting to J-Link via USB (Port: 0)
    DLL version V4.28c, compiled Jul 1 2011 14:23:12
    Firmware: J-Link ARM V8 compiled Jul 1 2011 12:02:49
    Hardware: V8.00
    S/N: 58001504
    VTarget = 3.209V
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.

    >> Adaptor 2, board 1

    J-Link>usb 0
    Connecting to J-Link via USB (Port: 0)
    DLL version V4.28c, compiled Jul 1 2011 14:23:12
    Firmware: J-Link ARM V6 compiled Jun 30 2009 11:04:04
    Hardware: V6.00
    S/N: 156002392
    OEM: IAR
    VTarget = 3.216V
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.
    Info: TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.
    J-Link>


    >> Adaptor 1, board 2

    J-Link>usb 0
    Connecting to J-Link via USB (Port: 0)
    DLL version V4.28c, compiled Jul 1 2011 14:23:12
    Firmware: J-Link ARM V8 compiled Jul 1 2011 12:02:49
    Hardware: V8.00
    S/N: 58001504
    VTarget = 3.209V
    Info: Could not measure total IR len. TDO is constant high.

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.


    >> Adaptor 2, board 2

    J-Link>usb 0
    Connecting to J-Link via USB (Port: 0)
    DLL version V4.28c, compiled Jul 1 2011 14:23:12
    Firmware: J-Link ARM V6 compiled Jun 30 2009 11:04:04
    Hardware: V6.00
    S/N: 156002392
    OEM: IAR
    VTarget = 3.229V
    Info: Could not measure total IR len. TDO is constant high.

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.
    Info: Could not measure total IR len. TDO is constant high.

    WARNING: CPU core not found.
    No devices found on JTAG chain. Trying to find device on SWD.

    WARNING: CPU core not found.
    No device found on SWD.
    Did not find any core.
    J-Link>

    I get similar issues of failing to connect when using the JLink with the IAR ARM compiler (only went to using JLINK>exe when the IAR compiler failed to connect, repeatedly)

    Any pointers or help would be greatly appreciated

  • Hi,

    is it possible that something has been programmed into the device which
    enables the CRP (Code Read Protection) which also causes the JTAG interface to be disabled?

    Or is there maybe an application in flash memory which has a bad PLL init which might lock up the CPU by configuring wrong multipliers / dividers or similar?


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Thank you for the suggestions.

    It appears in the end the problem was much more mundane!
    Our system has a much smaller connector on board for the JTAG and we connect from the large cable from the JLINK via a little adaptor board to a smaller cable to our device. Both the small cables had become damaged due to flexing at the connections. Sorry for wasting your time...

    For future reference, how would one recover from the situations you postulated?

    regards
    Andrew

  • Hi Andrew,

    Sorry for wasting your time...

    No problem. One more happy J-Link user :)

    For future reference, how would one recover from the situations you postulated?

    If the CRP has been enabled, there is nothing J-Link can do to erase the device since the JTAG interface is disabled.
    The LPC devices provide a so called ISP mode (UART communication) in which a device erase command can be sent to mass erase the device which also causes the CRP to be lifted.

    If the CRP is disabled but there is a malfunctioning application in the flash memory which for example locks-up the device by incorrectly setting up the PLL or things like that
    which also prevents a connection via JTAG and makes it impossible to identify the core,
    you can force the device to boot in ISP mode which does not start the application but the JTAG interface is enabled.
    In this mode the device can easily be erased via J-Flash, Flasher ARM etc.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Please Help

    Im having the same problem with my core, im using S3C2440A with an ARM9 core. I have Jlink-edu V8 and followed the setup with no luck.
    There is already a default program on the board, could that be the cause?

    -Tim

  • Hi Tim,

    Are you using an eval board or custom hardware?
    If custom hardware: Please check again with an eval board. Do you see the same behavior on the eval board?


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • its an Eval board im assuming, i didnt customize any of it.
    the odd thing is im able to halt/ reset/ go using the jlink commander, but nothing else.
    Ive looked into the board to see maybe theres something i have to do, but the only thing is using a
    10K Ohm resistor to pull the nrst pin high on the jtag to enable debugging, but the jlink says it already does this process.
    I hope im being decriptive enough
    -Tim

  • Hi Tim,

    Now I am confused...

    First you wrote:
    Im having the same problem with my core, im using S3C2440A with an ARM9 core. I have Jlink-edu V8 and followed the setup with no luck.


    Now you write:
    the odd thing is im able to halt/ reset/ go using the jlink commander, but nothing else.


    So what is the case?
    a) You have *the same* problem(s) as the people before that J-Link commander is not even able to detect the device
    or
    b) It can detect the device, you can perform operations on it but some fail


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • sorry for the confusion,
    1) i can use those commands but nothing else
    2) It does not see the core.
    3) i dont understand why it can issue commands yet not see the core when i used jlink commander
    so A i guess

  • Hi Tim,

    Could you please post a screenshot of the output of J-Link Commander?


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Here are two picture of the j link commander, the first is before i add a wire from pin 15 to gnd in order to drive the nrst low, (what j link said it should be)
    The second is after
    sorry for the bad pictures my laptop does have internet right now so i cant print screen it.
    -Tim
    Images

    • jlink.jpg

      186.73 kB, 1,273×683, viewed 3,392 times

    • jlink2.jpg

      162.35 kB, 1,088×673, viewed 2,923 times

  • Hi Tim,

    The warning output by J-Link Commander is a bit misleading here...
    What it should say is:

    nRESET (pin 15) was measured HIGH after pulling it LOW.

    nRESET should be HIGH by default, otherwise the CPU would be kept in reset all the time and connecting is impossible.
    In this particular case, J-Link was driving nRESET LOW to trigger a reset of the CPU, then check if nRESET really got LOW before releasing it again.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Tim,

    It can be the board or the device.
    Board: Some JTAG lines are not properly connected, signal quality too bad, ...
    Device: Device has some bad code running on it, causing some clocks to be disabled so the debug interface is no longer clocked,
    the bad code may not proper initialize the PLL causing the device to be running at a too high speed causing it to crash.

    These are the scenarios I can currently imagine of.


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.