[SOLVED] Minimum Interface Speeds

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  • [SOLVED] Minimum Interface Speeds

    I want to verify debug connectivity of a J-Trace Pro (Cortex-M) to a hardware emulation of a new ASIC under development. The emulation is dramatically slower than real-time, which effectively divides down the apparent clock rates of all external interfaces. This leads to 2 questions:

    1. What is the MINIMUM clock speed required from the target SWD interface for it to work with J-Trace PRO?
    2. What is the MINIMUM clock speed required from the target TRACE interface for it to work with J-Trace PRO?


    Russ

  • Hi,

    to 1)
    This is probably a combination of things.
    J-Trace can go down to 5 kHz with the JTAG/SWD clock.
    But inside the DAP on the target, it requires a DAP access to report WAIT (previously triggered DAP access in progress) for no more than 20ms.

    to 2)
    Has not been explicitly tested but I think we had it working on a target with 100 kHz trace clock.
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