ARM's FIQ mode and embOS

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • Hey Berg,

    Why do you want do to that?? I think it is no problem to use FIQ interrupts with embOS, I found something in the embOS manual:
    "FIQ interrupt can not be used with embOS functions, it is reserved for high speed user functions. FIQ is never disabled by embOS. Never call any embOS function from an FIQ handler. Do not assign any embOS interrupt handler to FIQ. When you decide to use FIQ, please ensure that FIQ stack is initialized duringstartup and an interrupt vector for FIQ handling is included in your application."

    But I cannot image why I should switch the CPU mode to FIQ mode within a task?? ?(
  • Ok. I explain...

    Our application program includes self-test routines. For performance purposes, I use the FIQ bank of registers in some of them to store the variables of the high-speed sections.

    The FIQ mode is then temporarily engaged in the context of an embOS premptable task. I know embOS sets the SYS mode to launch a task, but I don't know what is its behaviour when it shall stop and resume execution in another mode. No FIQ interrupt here.

    Any idea?
  • Ok, now I understand what you like to do. You want to switch to FIQ mode to have access to the to FIQ registers.

    I guess in general you are not allowed to switch to any other cpu mode while embOS is running, but if you really know what you do, this could work. You should ensure to get no interrupts, so FIQ interrupts should be disabled. Is it necessary for you to have IRQ interrupts enabled? I could imagine that FIQ interrupt has priority, so when you are in FIQ mode you will get no IRQ interrupt, but you should check this in your manual.
  • Hello Ralf,
    Hello Berg,

    makes sense to switch to FIQ mode to access FIQ registers.
    We have done the same thing where we need FIQs for very fast reaction to port signals.
    In our case the FIQ handler did most of the work and
    some of the FIQ registers need to be read or written from a task.
    This is no problem at all if you disable IRQs and FIQs when switching to FIQ mode.
    This can all be done with a single ARM instruction, just like the switch back to the previous mode
    when the register transfer is completed.

    Simply switching to FIQ mode without disabling interrupts is not a good idea since
    the mode is irrelevant for IRQ / FIQ enable: Only bits 6/7 disable IRQs and FIQs, so
    this NEEDs to be done.

    If you need sample code please let me know, I can post it here.