[SOLVED] SWD connect fails on Psoc63 when swd pins were used as GPIO

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  • [SOLVED] SWD connect fails on Psoc63 when swd pins were used as GPIO

    I have searched the forum but I couldn't find any issue about Psoc63 for this problem. I will use SWD pins as GPIOs. When I set it, I am able to program my device for first time. But, it is not possible to program again after first programming. I need to delete firmware of device with psoc programmer by using miniprog then I can program the device again with J-Link. I added a screenshot of commander when I try to program.

    I have found similar issue as below and its solution depends on software update of J-Link.
    [SOLVED] SWD connect fails on PSoC in low-power mode

    Device: CY8C6347LQI-BLD52
    J-Link Software Version : V6.80d (but I also tried with V7.50



    Thanks,
    Gokhan
    Images
    • ss_problem.PNG

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    The post was edited 1 time, last by gokhangurgenn ().

  • Hi,

    If your application reconfigures the debug pins as GPIOs, this effectively inhibits debugging.
    As the PSoC6 support has been implemented by Cypress / Infineon, no direct support is given by SEGGER.
    If there is a workaround / fallback method for this case, Cypress / Infineon would have to implement it, as they maintain the support, flash loaders, ...


    BR
    Alex
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