J-Link v10.x only works in SWD mode, older J-Links also work with JTAG mode

    This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

    • J-Link v10.x only works in SWD mode, older J-Links also work with JTAG mode

      I've run into something curious with v10.x J-Links. I have a project using the STM32F103ZG microcontroller and I'm currently using IAR EWARM 9.1.

      Flashing and debugging with older J-Links (v8, v9.1 and Ultra v4.3) work just fine in either JTAG or SWD mode - JTAG has been the default since the beginning. However, when some people started using v10.0 or v10.1 J-Link, flash and debug would only work in SWD mode.

      As an example, here's the Debug log from when I try to "Debug without download" using a v10.1 J-Link with JTAG configured instead of SWD. The J-Link's LED quickly flashes red/yellow (or red/green?) and I get a message "Failed to get CPU status after 4 retries".

      Source Code

      1. Tue May 04, 2021 07:58:28: IAR Embedded Workbench 9.10.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.0\arm\bin\armPROC.dll)
      2. Tue May 04, 2021 07:58:28: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.0\arm\config\debugger\ST\STM32F1xx.dmac
      3. Tue May 04, 2021 07:58:28: JLINK command: ProjectFile = C:\devtrees\obfuscated\settings\obfuscated_Debug.jlink, return = 0
      4. Tue May 04, 2021 07:58:28: Device "STM32F103ZG" selected.
      5. Tue May 04, 2021 07:58:28: DLL version: V6.94d, compiled Feb 12 2021 15:56:38
      6. Tue May 04, 2021 07:58:28: Firmware: J-Link V10 compiled Apr 27 2021 16:35:48
      7. Tue May 04, 2021 07:58:28: JTAG speed is initially set to: 32 kHz
      8. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      9. Tue May 04, 2021 07:58:28: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      10. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      11. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      12. Tue May 04, 2021 07:58:28: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      13. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      14. Tue May 04, 2021 07:58:28: Warning: STM32: Connecting to CPU via connect under reset failed.
      15. Tue May 04, 2021 07:58:28: Hardware reset with strategy 0 was performed
      16. Tue May 04, 2021 07:58:28: Initial reset was performed
      17. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      18. Tue May 04, 2021 07:58:28: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      19. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      20. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      21. Tue May 04, 2021 07:58:28: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      22. Tue May 04, 2021 07:58:28: TotalIRLen = 9, IRPrint = 0x0011
      23. Tue May 04, 2021 07:58:29: Warning: STM32: Connecting to CPU via connect under reset failed.
      24. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      25. Tue May 04, 2021 07:58:29: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      26. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      27. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      28. Tue May 04, 2021 07:58:29: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      29. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      30. Tue May 04, 2021 07:58:29: Warning: STM32: Connecting to CPU via connect under reset failed.
      31. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      32. Tue May 04, 2021 07:58:29: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      33. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      34. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      35. Tue May 04, 2021 07:58:29: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      36. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      37. Tue May 04, 2021 07:58:29: Warning: STM32: Connecting to CPU via connect under reset failed.
      38. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      39. Tue May 04, 2021 07:58:29: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      40. Tue May 04, 2021 07:58:29: TotalIRLen = 9, IRPrint = 0x0011
      41. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      42. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      43. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      44. Tue May 04, 2021 07:58:30: Warning: STM32: Connecting to CPU via connect under reset failed.
      45. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      46. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      47. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      48. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      49. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      50. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      51. Tue May 04, 2021 07:58:30: Warning: STM32: Connecting to CPU via connect under reset failed.
      52. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      53. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      54. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      55. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      56. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      57. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      58. Tue May 04, 2021 07:58:30: Warning: STM32: Connecting to CPU via connect under reset failed.
      59. Tue May 04, 2021 07:58:30: TotalIRLen = 9, IRPrint = 0x0011
      60. Tue May 04, 2021 07:58:30: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      61. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      62. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      63. Tue May 04, 2021 07:58:31: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      64. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      65. Tue May 04, 2021 07:58:31: Warning: STM32: Connecting to CPU via connect under reset failed.
      66. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      67. Tue May 04, 2021 07:58:31: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      68. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      69. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      70. Tue May 04, 2021 07:58:31: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      71. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      72. Tue May 04, 2021 07:58:31: Warning: STM32: Connecting to CPU via connect under reset failed.
      73. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      74. Tue May 04, 2021 07:58:31: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      75. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      76. Tue May 04, 2021 07:58:31: TotalIRLen = 9, IRPrint = 0x0011
      77. Tue May 04, 2021 07:58:31: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      78. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      79. Tue May 04, 2021 07:58:32: Warning: STM32: Connecting to CPU via connect under reset failed.
      80. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      81. Tue May 04, 2021 07:58:32: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      82. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      83. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      84. Tue May 04, 2021 07:58:32: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      85. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      86. Tue May 04, 2021 07:58:32: Warning: STM32: Connecting to CPU via connect under reset failed.
      87. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      88. Tue May 04, 2021 07:58:32: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      89. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      90. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      91. Tue May 04, 2021 07:58:32: STM32 (connect): Can not attach to CPU. Trying connect under reset.
      92. Tue May 04, 2021 07:58:32: TotalIRLen = 9, IRPrint = 0x0011
      93. Tue May 04, 2021 07:58:32: Warning: STM32: Connecting to CPU via connect under reset failed.
      94. Tue May 04, 2021 08:00:47: Unloaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.0\arm\config\debugger\ST\STM32F1xx.dmac
      95. Tue May 04, 2021 08:00:47: IAR Embedded Workbench 9.10.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.0\arm\bin\armPROC.dll)
      96. Tue May 04, 2021 08:00:47: Loading the jlink driver
      Display All
      This isn't a problem in the sense that simply changing to SWD works. But it was unexpected and there are some worries that maybe the JTAG isn't correct on the schematic/PCB layout (I'm not an EE so I can't begin to guess what's going on there - if anything). This happens with both a v10.0 and v10.1 J-Link. All older J-Links I've tried work fine in JTAG mode (and SWD mode).

      For comparison, I have also attached a debug log of a J-Link Ultra+ v4.3 successfully using JTAG mode.

      I'm wondering if this is something we should be concerned about, and if so do you have any suggestions for where we should look?
      Files
    • Hi,
      Thank you for your inquiry.
      We are not aware of any issues related to the STM32F1 series and JTAG.

      I just gave this a quick try and it seems to be working without any issues on an STM32F10X-128K-EVAL board (STM32F103V8):


      Do you experience the same issue on an evaluation board?
      Could you please send us a J-Link log file? How to enable:
      wiki.segger.com/J-Link_DLL#Enable_J-Link_Log_File

      Best regards,
      Fabian
      Please read the forum rules before posting: Forum Rules

      Keep in mind, this is not a support forum. Its main purpose is user to user interaction.
      Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
      Should you be entitled to support you can contact us via our support system: segger.com/ticket/


      Or you can contact us via e-mail.
    • Sorry for my delayed response (I didn't get or I missed an email notification).

      I will try your suggestions, but it might be a while as I'm up against a deadline right now. The J-Link v10 does work on these boards in SWD mode, so the problem is just an annoyance so far.

      I did do a J-Link session to connect and the v10.1 J-Link worked as well as you session did. Some time in the next week or so, I'll try updating the DLL that is used in IAR to the 7.2 version and see if that makes a difference.

      My jlink.exe session that connects successfully:

      Source Code

      1. C:\Program Files (x86)\SEGGER\JLink_V720>jlink
      2. SEGGER J-Link Commander V7.20 (Compiled Apr 28 2021 17:35:36)
      3. DLL version V7.20, compiled Apr 28 2021 17:34:08
      4. Connecting to J-Link via USB...O.K.
      5. Firmware: J-Link V10 compiled Apr 27 2021 16:35:48
      6. Hardware version: V10.10
      7. S/N: 50100825
      8. License(s): GDB
      9. VTref=0.000V
      10. Type "connect" to establish a target connection, '?' for help
      11. J-Link>con
      12. Please specify device / core. <Default>: STM32F103ZG
      13. Type '?' for selection dialog
      14. Device>STM32F103ZG
      15. Please specify target interface:
      16. J) JTAG (Default)
      17. S) SWD
      18. T) cJTAG
      19. TIF>j
      20. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
      21. JTAGConf>
      22. Specify target interface speed [kHz]. <Default>: 4000 kHz
      23. Speed>
      24. Device "STM32F103ZG" selected.
      25. Connecting to target via JTAG
      26. InitTarget() start
      27. InitTarget() end
      28. TotalIRLen = 9, IRPrint = 0x0011
      29. JTAG chain detection found 2 devices:
      30. #0 Id: 0x3BA00477, IRLen: 04, CoreSight JTAG-DP
      31. #1 Id: 0x06430041, IRLen: 05, STM32 Boundary Scan
      32. DPv0 detected
      33. Scanning AP map to find all available APs
      34. AP[1]: Stopped AP scan as end of AP map has been reached
      35. AP[0]: AHB-AP (IDR: 0x14770011)
      36. Iterating through AP map to find AHB-AP to use
      37. AP[0]: Core found
      38. AP[0]: AHB-AP ROM base: 0xE00FF000
      39. CPUID register: 0x411FC231. Implementer code: 0x41 (ARM)
      40. Found Cortex-M3 r1p1, Little endian.
      41. FPUnit: 6 code (BP) slots and 2 literal slots
      42. CoreSight components:
      43. ROMTbl[0] @ E00FF000
      44. ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 001BB000 SCS
      45. ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 001BB002 DWT
      46. ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB003 FPB
      47. ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 001BB001 ITM
      48. ROMTbl[0][4]: E0040000, CID: B105900D, PID: 001BB923 TPIU-Lite
      49. ROMTbl[0][5]: E0041000, CID: B105900D, PID: 101BB924 ETM-M3
      50. Cortex-M3 identified.
      51. J-Link>
      Display All

      My log looks pretty much identical to yours except for the DLL version used and this line near the end that is in my log but not yours:

      ROMTbl[0][5]: E0041000, CID: B105900D, PID: 101BB924 ETM-M3

      I have no idea what it indicates or if it's at all significant.