Hi,

I am fairly new to JTag Debugging and for our companies project, we are currently using it to debug one of our systems.

In this regard, the system uses an IMX6Q7 CPU (Cortex A9) with 4 cores running baremetal. The scenario is to attach to a running system (with a JLink Ultra+) not to interrupt the system as a whole.

So far, I was successful in attaching with Ozone to different cores by using a JLinkScript file setting the CORESIGHT_CoreBaseAddr variable in the InitTarget() function, if I want to debug anything but core #0.

However this works only with one core and while I can open multiple Ozones and even attach to the various cores (3 work simultaneously so far), they all halt independently.

I know that there is no native support for setting up Coresight ECT/CTM/CTI, however I do have the addresses of the for Cross Trigger Interfaces (CTI) the CPU is providing. According to the manual, the interfaces allow the configuration of the matrix (CTM) to halt and restart Cores simultaniously on trigger events (somehow).

The internet is rather empty when it comes to a description how this is exactly set up. I do know that the Interfaces need to be unlocked with an ACCESS word, which can be found on the website of ARM or in a Linux Kernel reference. However beyond that I don't know anything. It would be good to know if anybody has knowledge or experience to clear up the questions about...

• ...what and which registers I need to write to of each CTI to achieve my goal or connecting trigger events
  
• ...how trigger events map to something like a breakpoint in Ozone (or are they just the same)
  
• ...how to put this into the JScriptFile, since I have no clue which function to use to write those values
  

It's a long shot to ask in the forum, but I thought I'd try.

Thanks to anyone who can help.

Hi Nino,

thanks for your answer. I have already searched the forum and it seems like the CTI feature has been postponed quite a few times from 2019 to end of 2020 to now end of 2021. It being essential for every day debugging, I don't see how such a feature can simply be missing in the catalogue.

It seems like you have quite some knowledge regarding this feature and also the resources. As far as I can tell, if I could set it up, I could even trigger it. While you say that Ozone doesn't have the capabilities to do so, software running in privileged mode directly on the CPU can.

To be specific, I am trying to catch an error that happens on one core and lasts for about 30ms. Detecting this state, I could trigger a halt from another core. I was hoping to use a global variable seen from both CPUs as a watchpoint, however since the core in question doesn't access the variable (and is possibly in an unknown state), triggering via breakpoints/watchpoints or IRQs is out of the question. What remains is - to date - ECT/CTI/CTM.

If you could give me some general examples how CTM/CTI is configured and how such a trigger is done for CTI, I'd be grateful.

Otherwise debugging such a case is just for the big league debuggers instead. Or even OpenOCD, which seems to have some knowledge about the topic (no idea how to configure it through).

Have a great day.